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| author | Evan Cheng <evan.cheng@apple.com> | 2011-10-27 21:21:05 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-10-27 21:21:05 +0000 |
| commit | 824a70a384988aebbe3b46254a3631e81a8f0690 (patch) | |
| tree | aa1e9da6fb36b459aa39acee2ed512bc528a1f48 /test/CodeGen/ARM/avoid-cpsr-rmw.ll | |
| parent | dd4667f909d1cd7bbcb75f4578bdcf1c177c8e09 (diff) | |
| download | llvm-824a70a384988aebbe3b46254a3631e81a8f0690.tar.gz llvm-824a70a384988aebbe3b46254a3631e81a8f0690.tar.bz2 llvm-824a70a384988aebbe3b46254a3631e81a8f0690.tar.xz | |
Avoid partial CPSR dependency from loop backedges. rdar://10357570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143145 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/avoid-cpsr-rmw.ll')
| -rw-r--r-- | test/CodeGen/ARM/avoid-cpsr-rmw.ll | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/avoid-cpsr-rmw.ll b/test/CodeGen/ARM/avoid-cpsr-rmw.ll index 92aff7007f..877ec18062 100644 --- a/test/CodeGen/ARM/avoid-cpsr-rmw.ll +++ b/test/CodeGen/ARM/avoid-cpsr-rmw.ll @@ -3,9 +3,9 @@ ; dependency) when it isn't dependent on last CPSR defining instruction. ; rdar://8928208 -define i32 @t(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone { +define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone { entry: -; CHECK: t: +; CHECK: t1: ; CHECK: muls [[REG:(r[0-9]+)]], r2, r3 ; CHECK-NEXT: mul [[REG2:(r[0-9]+)]], r0, r1 ; CHECK-NEXT: muls r0, [[REG2]], [[REG]] @@ -14,3 +14,37 @@ define i32 @t(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone { %2 = mul nsw i32 %0, %1 ret i32 %2 } + +; Avoid partial CPSR dependency via loop backedge. +; rdar://10357570 +define void @t2(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind { +entry: +; CHECK: t2: + %tobool7 = icmp eq i32* %ptr2, null + br i1 %tobool7, label %while.end, label %while.body + +while.body: +; CHECK: while.body +; CHECK: mul r{{[0-9]+}} +; CHECK-NOT: muls + %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ] + %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ] + %0 = load i32* %ptr1.addr.09, align 4 + %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1 + %1 = load i32* %arrayidx1, align 4 + %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2 + %2 = load i32* %arrayidx3, align 4 + %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3 + %3 = load i32* %arrayidx4, align 4 + %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4 + %mul = mul i32 %1, %0 + %mul5 = mul i32 %mul, %2 + %mul6 = mul i32 %mul5, %3 + store i32 %mul6, i32* %ptr2.addr.08, align 4 + %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1 + %tobool = icmp eq i32* %incdec.ptr, null + br i1 %tobool, label %while.end, label %while.body + +while.end: + ret void +} |