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author | Benjamin Kramer <benny.kra@googlemail.com> | 2013-08-16 12:52:08 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2013-08-16 12:52:08 +0000 |
commit | 671aea08f8dfb09a0191e7b9e266c2884efd3252 (patch) | |
tree | f7281df97d7c9ec5ce846ce619b519b8b0613a0a /test/CodeGen/ARM/fast-isel-pic.ll | |
parent | e97fc44045732de9fc4715241013f9238ec007dc (diff) | |
download | llvm-671aea08f8dfb09a0191e7b9e266c2884efd3252.tar.gz llvm-671aea08f8dfb09a0191e7b9e266c2884efd3252.tar.bz2 llvm-671aea08f8dfb09a0191e7b9e266c2884efd3252.tar.xz |
When initializing the PIC global base register on ARM/ELF add pc to fix the address.
This unbreaks PIC with fast isel on ELF targets (PR16717). The output matches
what GCC and SDag do for PIC but may not cover all of the many flavors of PIC
that exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188551 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-pic.ll')
-rw-r--r-- | test/CodeGen/ARM/fast-isel-pic.ll | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/fast-isel-pic.ll b/test/CodeGen/ARM/fast-isel-pic.ll index ad0f15966f..e3e5972cf7 100644 --- a/test/CodeGen/ARM/fast-isel-pic.ll +++ b/test/CodeGen/ARM/fast-isel-pic.ll @@ -25,6 +25,8 @@ entry: ; ARMv7: add [[reg2]], pc, [[reg2]] ; ARMv7-ELF: LoadGV ; ARMv7-ELF: ldr r[[reg2:[0-9]+]], +; ARMv7-ELF: .LPC +; ARMv7-ELF-NEXT: add r[[reg2]], pc ; ARMv7-ELF: ldr r[[reg3:[0-9]+]], ; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]] %tmp = load i32* @g @@ -54,6 +56,8 @@ entry: ; ARMv7: ldr r[[reg5]], [r[[reg5]]] ; ARMv7-ELF: LoadIndirectSymbol ; ARMv7-ELF: ldr r[[reg5:[0-9]+]], +; ARMv7-ELF: .LPC +; ARMv7-ELF-NEXT: add r[[reg5]], pc ; ARMv7-ELF: ldr r[[reg6:[0-9]+]], ; ARMv7-ELF: ldr r[[reg5]], [r[[reg6]], r[[reg5]]] %tmp = load i32* @i |