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author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-14 06:24:09 +0000 |
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committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-14 06:24:09 +0000 |
commit | 8b2b8a18354546d534b72f912153a3252ab4b857 (patch) | |
tree | 9e745a19e157915db1f88e171514f4d22041c62a /test/CodeGen/ARM/vneg.ll | |
parent | 6611eaa32f7941dd50a3ffe608f3f4a7665dbe91 (diff) | |
download | llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.gz llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.bz2 llvm-8b2b8a18354546d534b72f912153a3252ab4b857.tar.xz |
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally.
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vneg.ll')
-rw-r--r-- | test/CodeGen/ARM/vneg.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/test/CodeGen/ARM/vneg.ll b/test/CodeGen/ARM/vneg.ll index 4a10732458..1be4f74821 100644 --- a/test/CodeGen/ARM/vneg.ll +++ b/test/CodeGen/ARM/vneg.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vnegs8(<8 x i8>* %A) nounwind { -;CHECK: vnegs8: +;CHECK-LABEL: vnegs8: ;CHECK: vneg.s8 %tmp1 = load <8 x i8>* %A %tmp2 = sub <8 x i8> zeroinitializer, %tmp1 @@ -9,7 +9,7 @@ define <8 x i8> @vnegs8(<8 x i8>* %A) nounwind { } define <4 x i16> @vnegs16(<4 x i16>* %A) nounwind { -;CHECK: vnegs16: +;CHECK-LABEL: vnegs16: ;CHECK: vneg.s16 %tmp1 = load <4 x i16>* %A %tmp2 = sub <4 x i16> zeroinitializer, %tmp1 @@ -17,7 +17,7 @@ define <4 x i16> @vnegs16(<4 x i16>* %A) nounwind { } define <2 x i32> @vnegs32(<2 x i32>* %A) nounwind { -;CHECK: vnegs32: +;CHECK-LABEL: vnegs32: ;CHECK: vneg.s32 %tmp1 = load <2 x i32>* %A %tmp2 = sub <2 x i32> zeroinitializer, %tmp1 @@ -25,7 +25,7 @@ define <2 x i32> @vnegs32(<2 x i32>* %A) nounwind { } define <2 x float> @vnegf32(<2 x float>* %A) nounwind { -;CHECK: vnegf32: +;CHECK-LABEL: vnegf32: ;CHECK: vneg.f32 %tmp1 = load <2 x float>* %A %tmp2 = fsub <2 x float> < float -0.000000e+00, float -0.000000e+00 >, %tmp1 @@ -33,7 +33,7 @@ define <2 x float> @vnegf32(<2 x float>* %A) nounwind { } define <16 x i8> @vnegQs8(<16 x i8>* %A) nounwind { -;CHECK: vnegQs8: +;CHECK-LABEL: vnegQs8: ;CHECK: vneg.s8 %tmp1 = load <16 x i8>* %A %tmp2 = sub <16 x i8> zeroinitializer, %tmp1 @@ -41,7 +41,7 @@ define <16 x i8> @vnegQs8(<16 x i8>* %A) nounwind { } define <8 x i16> @vnegQs16(<8 x i16>* %A) nounwind { -;CHECK: vnegQs16: +;CHECK-LABEL: vnegQs16: ;CHECK: vneg.s16 %tmp1 = load <8 x i16>* %A %tmp2 = sub <8 x i16> zeroinitializer, %tmp1 @@ -49,7 +49,7 @@ define <8 x i16> @vnegQs16(<8 x i16>* %A) nounwind { } define <4 x i32> @vnegQs32(<4 x i32>* %A) nounwind { -;CHECK: vnegQs32: +;CHECK-LABEL: vnegQs32: ;CHECK: vneg.s32 %tmp1 = load <4 x i32>* %A %tmp2 = sub <4 x i32> zeroinitializer, %tmp1 @@ -57,7 +57,7 @@ define <4 x i32> @vnegQs32(<4 x i32>* %A) nounwind { } define <4 x float> @vnegQf32(<4 x float>* %A) nounwind { -;CHECK: vnegQf32: +;CHECK-LABEL: vnegQf32: ;CHECK: vneg.f32 %tmp1 = load <4 x float>* %A %tmp2 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %tmp1 @@ -65,7 +65,7 @@ define <4 x float> @vnegQf32(<4 x float>* %A) nounwind { } define <8 x i8> @vqnegs8(<8 x i8>* %A) nounwind { -;CHECK: vqnegs8: +;CHECK-LABEL: vqnegs8: ;CHECK: vqneg.s8 %tmp1 = load <8 x i8>* %A %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1) @@ -73,7 +73,7 @@ define <8 x i8> @vqnegs8(<8 x i8>* %A) nounwind { } define <4 x i16> @vqnegs16(<4 x i16>* %A) nounwind { -;CHECK: vqnegs16: +;CHECK-LABEL: vqnegs16: ;CHECK: vqneg.s16 %tmp1 = load <4 x i16>* %A %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1) @@ -81,7 +81,7 @@ define <4 x i16> @vqnegs16(<4 x i16>* %A) nounwind { } define <2 x i32> @vqnegs32(<2 x i32>* %A) nounwind { -;CHECK: vqnegs32: +;CHECK-LABEL: vqnegs32: ;CHECK: vqneg.s32 %tmp1 = load <2 x i32>* %A %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1) @@ -89,7 +89,7 @@ define <2 x i32> @vqnegs32(<2 x i32>* %A) nounwind { } define <16 x i8> @vqnegQs8(<16 x i8>* %A) nounwind { -;CHECK: vqnegQs8: +;CHECK-LABEL: vqnegQs8: ;CHECK: vqneg.s8 %tmp1 = load <16 x i8>* %A %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1) @@ -97,7 +97,7 @@ define <16 x i8> @vqnegQs8(<16 x i8>* %A) nounwind { } define <8 x i16> @vqnegQs16(<8 x i16>* %A) nounwind { -;CHECK: vqnegQs16: +;CHECK-LABEL: vqnegQs16: ;CHECK: vqneg.s16 %tmp1 = load <8 x i16>* %A %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1) @@ -105,7 +105,7 @@ define <8 x i16> @vqnegQs16(<8 x i16>* %A) nounwind { } define <4 x i32> @vqnegQs32(<4 x i32>* %A) nounwind { -;CHECK: vqnegQs32: +;CHECK-LABEL: vqnegQs32: ;CHECK: vqneg.s32 %tmp1 = load <4 x i32>* %A %tmp2 = call <4 x i32> @llvm.arm.neon.vqneg.v4i32(<4 x i32> %tmp1) |