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author | Tim Northover <tnorthover@apple.com> | 2013-08-28 14:33:33 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2013-08-28 14:33:33 +0000 |
commit | d3128a4a5a8531a256a224422d7da178d18459eb (patch) | |
tree | 3eb110b310ac79a3b40d861547e61f1e7a8f52dd /test/CodeGen/ARM/vsub.ll | |
parent | c85bb78714e8e05fb3022148320ea685d7f98d60 (diff) | |
download | llvm-d3128a4a5a8531a256a224422d7da178d18459eb.tar.gz llvm-d3128a4a5a8531a256a224422d7da178d18459eb.tar.bz2 llvm-d3128a4a5a8531a256a224422d7da178d18459eb.tar.xz |
ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics.
Clang is now generating cleaner IR, so this removes the old variants which
should be completely unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189481 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/vsub.ll')
-rw-r--r-- | test/CodeGen/ARM/vsub.ll | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/test/CodeGen/ARM/vsub.ll b/test/CodeGen/ARM/vsub.ll index 8ed8d42459..6b95b97378 100644 --- a/test/CodeGen/ARM/vsub.ll +++ b/test/CodeGen/ARM/vsub.ll @@ -90,37 +90,6 @@ define <4 x float> @vsubQf32(<4 x float>* %A, <4 x float>* %B) nounwind { ret <4 x float> %tmp3 } -define <8 x i8> @vsubhni16(<8 x i16>* %A, <8 x i16>* %B) nounwind { -;CHECK-LABEL: vsubhni16: -;CHECK: vsubhn.i16 - %tmp1 = load <8 x i16>* %A - %tmp2 = load <8 x i16>* %B - %tmp3 = call <8 x i8> @llvm.arm.neon.vsubhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2) - ret <8 x i8> %tmp3 -} - -define <4 x i16> @vsubhni32(<4 x i32>* %A, <4 x i32>* %B) nounwind { -;CHECK-LABEL: vsubhni32: -;CHECK: vsubhn.i32 - %tmp1 = load <4 x i32>* %A - %tmp2 = load <4 x i32>* %B - %tmp3 = call <4 x i16> @llvm.arm.neon.vsubhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2) - ret <4 x i16> %tmp3 -} - -define <2 x i32> @vsubhni64(<2 x i64>* %A, <2 x i64>* %B) nounwind { -;CHECK-LABEL: vsubhni64: -;CHECK: vsubhn.i64 - %tmp1 = load <2 x i64>* %A - %tmp2 = load <2 x i64>* %B - %tmp3 = call <2 x i32> @llvm.arm.neon.vsubhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2) - ret <2 x i32> %tmp3 -} - -declare <8 x i8> @llvm.arm.neon.vsubhn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone -declare <4 x i16> @llvm.arm.neon.vsubhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone -declare <2 x i32> @llvm.arm.neon.vsubhn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone - define <8 x i8> @vsubhni16_natural(<8 x i16> %A, <8 x i16> %B) nounwind { ; CHECK-LABEL: vsubhni16_natural: ; CHECK: vsubhn.i16 |