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authorTanya Lattner <tonic@nondot.org>2011-05-18 06:42:21 +0000
committerTanya Lattner <tonic@nondot.org>2011-05-18 06:42:21 +0000
commit2a8eb722c7bb0fac2fe09a876f3471dcb25f465e (patch)
treed695e339ba60f7e6c04a9c67a01504cc937e8e43 /test/CodeGen/ARM
parent0e30f02f44185b43d279b7b3ef8b3356f2b5c7cb (diff)
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In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.
Updated test case and reverted change to the PerfectShuffle Table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM')
-rw-r--r--test/CodeGen/ARM/vrev.ll5
1 files changed, 2 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/vrev.ll b/test/CodeGen/ARM/vrev.ll
index 89e222714c..0f0ea2b932 100644
--- a/test/CodeGen/ARM/vrev.ll
+++ b/test/CodeGen/ARM/vrev.ll
@@ -148,12 +148,11 @@ define void @test_with_vcombine(<4 x float>* %v) nounwind {
ret void
}
-; Test the shuffle of a 4xi16 which exposed a problem with the perfect shuffle table
-; entry for vrev.
+; vrev <4 x i16> should use VREV32 and not VREV64
define void @test_vrev64(<4 x i16>* nocapture %source, <2 x i16>* nocapture %dst) nounwind ssp {
; CHECK: test_vrev64:
-; CHECK: vrev64.16
; CHECK: vext.16
+; CHECK: vrev32.16
entry:
%0 = bitcast <4 x i16>* %source to <8 x i16>*
%tmp2 = load <8 x i16>* %0, align 4