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authorScott Michel <scottm@aero.org>2008-06-02 22:18:03 +0000
committerScott Michel <scottm@aero.org>2008-06-02 22:18:03 +0000
commit8bf61e8c2a39bcf070c39848fea83eda57851ebb (patch)
treea73a80f3763205767300ee4a008edd8cc8b17dbf /test/CodeGen/CellSPU
parent193c2358507b151ffbca2f0bb6fbfba55b60bdbd (diff)
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Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
issue is operand promotion for setcc/select... but looks like the fundamental stuff is implemented for CellSPU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/CellSPU')
-rw-r--r--test/CodeGen/CellSPU/immed64.ll24
1 files changed, 12 insertions, 12 deletions
diff --git a/test/CodeGen/CellSPU/immed64.ll b/test/CodeGen/CellSPU/immed64.ll
index 7ef3d766bb..d93322202a 100644
--- a/test/CodeGen/CellSPU/immed64.ll
+++ b/test/CodeGen/CellSPU/immed64.ll
@@ -1,16 +1,16 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
-; RUN: grep lqa %t1.s | count 13
-; RUN: grep il %t1.s | count 22
-; RUN: grep shufb %t1.s | count 13
-; RUN: grep 65520 %t1.s | count 1
-; RUN: grep 43981 %t1.s | count 1
-; RUN: grep 13702 %t1.s | count 1
-; RUN: grep 81 %t1.s | count 2
-; RUN: grep 28225 %t1.s | count 1
-; RUN: grep 30720 %t1.s | count 1
-; RUN: grep 192 %t1.s | count 32
-; RUN: grep 128 %t1.s | count 30
-; RUN: grep 224 %t1.s | count 2
+; RUN: grep lqa %t1.s | count 13
+; RUN: grep il %t1.s | count 22
+; RUN: grep shufb %t1.s | count 13
+; RUN: grep 65520 %t1.s | count 1
+; RUN: grep 43981 %t1.s | count 1
+; RUN: grep 13702 %t1.s | count 1
+; RUN: grep 28225 %t1.s | count 1
+; RUN: grep 30720 %t1.s | count 1
+; RUN: grep 3233857728 %t1.s | count 8
+; RUN: grep 2155905152 %t1.s | count 6
+; RUN: grep 66051 %t1.s | count 7
+; RUN: grep 471670303 %t1.s | count 11
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"