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authorNadav Rotem <nadav.rotem@intel.com>2011-09-08 08:11:19 +0000
committerNadav Rotem <nadav.rotem@intel.com>2011-09-08 08:11:19 +0000
commitffe3e7da849a10cdbe8ee4e5b5e243fc48ca0ffd (patch)
tree6eaaab69d092573c574d305e528d81f23b9391df /test/CodeGen/Generic
parent6d483c2b0712d0111b02d23cda7c65c0f43cf1f1 (diff)
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Add X86-SSE4 codegen support for vector-select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139285 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Generic')
-rw-r--r--test/CodeGen/Generic/promote-integers.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/Generic/promote-integers.ll b/test/CodeGen/Generic/promote-integers.ll
index 58125921b3..d965abf261 100644
--- a/test/CodeGen/Generic/promote-integers.ll
+++ b/test/CodeGen/Generic/promote-integers.ll
@@ -3,8 +3,8 @@
; This test is the poster-child for integer-element-promotion.
; Until this feature is complete, we mark this test as expected to fail.
-; XFAIL: *
; CHECK: vector_code
+; CHECK: blend
; CHECK: ret
define <4 x float> @vector_code(<4 x i64> %A, <4 x i64> %B, <4 x float> %R0, <4 x float> %R1 ) {
%C = icmp eq <4 x i64> %A, %B