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| author | Sirish Pande <spande@codeaurora.org> | 2012-04-23 17:49:28 +0000 |
|---|---|---|
| committer | Sirish Pande <spande@codeaurora.org> | 2012-04-23 17:49:28 +0000 |
| commit | 1bfd24851ef35e754d9652551e1a7abb12fe6738 (patch) | |
| tree | cbf6d9ca9b644248eea1e450d29ff96e14e6e54f /test/CodeGen/Hexagon/newvaluejump2.ll | |
| parent | 0dac3919e52e28308deba555bbcb6286674d5495 (diff) | |
| download | llvm-1bfd24851ef35e754d9652551e1a7abb12fe6738.tar.gz llvm-1bfd24851ef35e754d9652551e1a7abb12fe6738.tar.bz2 llvm-1bfd24851ef35e754d9652551e1a7abb12fe6738.tar.xz | |
Support for Hexagon architectural feature, new value jump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155366 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon/newvaluejump2.ll')
| -rw-r--r-- | test/CodeGen/Hexagon/newvaluejump2.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/newvaluejump2.ll b/test/CodeGen/Hexagon/newvaluejump2.ll new file mode 100644 index 0000000000..cb2f33e4c0 --- /dev/null +++ b/test/CodeGen/Hexagon/newvaluejump2.ll @@ -0,0 +1,30 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that we generate new value jump, both registers, with one +; of the registers as new. + +@Reg = common global i8 0, align 1 +define i32 @main() nounwind { +entry: +; CHECK: if (cmp.eq(r{{[0-9]+}}.new, r{{[0-9]+}})) jump{{.}} + %Reg2 = alloca i8, align 1 + %0 = load i8* %Reg2, align 1 + %conv0 = zext i8 %0 to i32 + %1 = load i8* @Reg, align 1 + %conv1 = zext i8 %1 to i32 + %tobool = icmp sle i32 %conv0, %conv1 + br i1 %tobool, label %if.then, label %if.else + +if.then: + call void @bar(i32 1, i32 2) + br label %if.end + +if.else: + call void @baz(i32 10, i32 20) + br label %if.end + +if.end: + ret i32 0 +} + +declare void @bar(i32, i32) +declare void @baz(i32, i32) |