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authorAkira Hatanaka <ahatanaka@mips.com>2013-10-15 01:06:30 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-10-15 01:06:30 +0000
commit89fee2ff928254f21cc9be358e1d8d4498fa0aee (patch)
tree1acebba76135fb5f9ee336e662e18f5ce34ede0c /test/CodeGen/Mips
parentb00491341778776a4d994846ca2f7fafe79c161d (diff)
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[mips] Transfer kill flag to the newly created operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192662 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips')
-rw-r--r--test/CodeGen/Mips/divrem.ll14
-rw-r--r--test/CodeGen/Mips/mips64instrs.ll16
2 files changed, 24 insertions, 6 deletions
diff --git a/test/CodeGen/Mips/divrem.ll b/test/CodeGen/Mips/divrem.ll
index a983c46766..b631c3b279 100644
--- a/test/CodeGen/Mips/divrem.ll
+++ b/test/CodeGen/Mips/divrem.ll
@@ -1,4 +1,5 @@
-; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=TRAP
+; RUN: llc -march=mips -verify-machineinstrs < %s |\
+; RUN: FileCheck %s -check-prefix=TRAP
; RUN: llc -march=mips -mno-check-zero-division < %s |\
; RUN: FileCheck %s -check-prefix=NOCHECK
@@ -11,6 +12,9 @@
; NOCHECK-NOT: teq
; NOCHECK: .end sdiv1
+@g0 = common global i32 0, align 4
+@g1 = common global i32 0, align 4
+
define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%div = sdiv i32 %a0, %a1
@@ -67,3 +71,11 @@ entry:
%div = udiv i32 %a0, %a1
ret i32 %div
}
+
+define i32 @killFlags() {
+entry:
+ %0 = load i32* @g0, align 4
+ %1 = load i32* @g1, align 4
+ %div = sdiv i32 %0, %1
+ ret i32 %div
+}
diff --git a/test/CodeGen/Mips/mips64instrs.ll b/test/CodeGen/Mips/mips64instrs.ll
index 7b06c2d764..2894d698ad 100644
--- a/test/CodeGen/Mips/mips64instrs.ll
+++ b/test/CodeGen/Mips/mips64instrs.ll
@@ -1,4 +1,7 @@
-; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
+; RUN: llc -march=mips64el -mcpu=mips64 -verify-machineinstrs < %s | FileCheck %s
+
+@gll0 = common global i64 0, align 8
+@gll1 = common global i64 0, align 8
define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
entry:
@@ -90,17 +93,21 @@ entry:
; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
- %div = sdiv i64 %a, %b
+ %0 = load i64* @gll0, align 8
+ %1 = load i64* @gll1, align 8
+ %div = sdiv i64 %0, %1
ret i64 %div
}
-define i64 @f15(i64 %a, i64 %b) nounwind readnone {
+define i64 @f15() nounwind readnone {
entry:
; CHECK-LABEL: f15:
; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
- %div = udiv i64 %a, %b
+ %0 = load i64* @gll0, align 8
+ %1 = load i64* @gll1, align 8
+ %div = udiv i64 %0, %1
ret i64 %div
}
@@ -148,4 +155,3 @@ entry:
%neg = xor i64 %or, -1
ret i64 %neg
}
-