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authorJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:27 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2013-08-06 14:13:27 +0000
commit82767327c59ede1f8663ec9b9a64a668993d501f (patch)
treef6e6c75ebb7e82f6d86053b46551572aedb5d621 /test/CodeGen/NVPTX
parent8775a51d94b277ca6ebe12a1d20bfc2bc5a53960 (diff)
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[NVPTX] Start conversion to MC infrastructure
This change converts the NVPTX target to use the MC infrastructure instead of directly emitting MachineInstr instances. This brings the target more up-to-date with LLVM TOT, and should fix PR15175 and PR15958 (libNVPTXInstPrinter is empty) as a side-effect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187798 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/NVPTX')
-rw-r--r--test/CodeGen/NVPTX/fp-literals.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/NVPTX/fp-literals.ll b/test/CodeGen/NVPTX/fp-literals.ll
new file mode 100644
index 0000000000..0cc2413e00
--- /dev/null
+++ b/test/CodeGen/NVPTX/fp-literals.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
+
+; Make sure we can properly differentiate between single-precision and
+; double-precision FP literals.
+
+; CHECK: myaddf
+; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, 0f3F800000
+define float @myaddf(float %a) {
+ %ret = fadd float %a, 1.0
+ ret float %ret
+}
+
+; CHECK: myaddd
+; CHECK: add.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, 0d3FF0000000000000
+define double @myaddd(double %a) {
+ %ret = fadd double %a, 1.0
+ ret double %ret
+}