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authorHal Finkel <hfinkel@anl.gov>2013-05-18 09:20:39 +0000
committerHal Finkel <hfinkel@anl.gov>2013-05-18 09:20:39 +0000
commitbf0bc3b2a2e11ff7e79b881ca82324fe17919a97 (patch)
treed954a0523b7bedfa4720f460641dd06691eb9fcb /test/CodeGen/PowerPC/ctrloop-asm.ll
parent9f61e485e6c4a6763695ab399ff61567271836df (diff)
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Check InlineAsm clobbers in PPCCTRLoops
We don't need to reject all inline asm as using the counter register (most does not). Only those that explicitly clobber the counter register need to prevent the transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182191 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/ctrloop-asm.ll')
-rw-r--r--test/CodeGen/PowerPC/ctrloop-asm.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/ctrloop-asm.ll b/test/CodeGen/PowerPC/ctrloop-asm.ll
new file mode 100644
index 0000000000..28afbf2bab
--- /dev/null
+++ b/test/CodeGen/PowerPC/ctrloop-asm.ll
@@ -0,0 +1,38 @@
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-freebsd10.0"
+; RUN: llc < %s -march=ppc64 | FileCheck %s
+
+define void @test1(i32 %c) nounwind {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ call void asm sideeffect "", "~{r5}"() nounwind
+ %inc = add nsw i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 2048
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+; CHECK: @test1
+; CHECK: mtctr
+}
+
+define void @test2(i32 %c) nounwind {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ call void asm sideeffect "", "~{ctr}"() nounwind
+ %inc = add nsw i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 2048
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+; CHECK: @test2
+; CHECK-NOT: mtctr
+}
+