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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-12 15:18:14 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-12 15:18:14 +0000 |
| commit | 4d53e7798c94143a22a9871261b8443592b929d5 (patch) | |
| tree | 430ff7149d501e532a89cfbbbd3d1b2648b6f821 /test/CodeGen/PowerPC/varargs.ll | |
| parent | 7285e8d98c9a44b7efe792462188cfe713dd9641 (diff) | |
| download | llvm-4d53e7798c94143a22a9871261b8443592b929d5.tar.gz llvm-4d53e7798c94143a22a9871261b8443592b929d5.tar.bz2 llvm-4d53e7798c94143a22a9871261b8443592b929d5.tar.xz | |
Don't reserve R2 on Darwin/PPC
Now that only the register-scavenger version of the CR spilling code remains,
we no longer need the Darwin R2 hack. Darwin can use R0 as a spare register in
any case where the System V ABI uses it (R0 is special architecturally, and so
is reserved under all common ABIs).
A few test cases needed to be updated to reflect the register-allocation changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176868 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/varargs.ll')
| -rw-r--r-- | test/CodeGen/PowerPC/varargs.ll | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/test/CodeGen/PowerPC/varargs.ll b/test/CodeGen/PowerPC/varargs.ll index 1769be957a..90f0480d6a 100644 --- a/test/CodeGen/PowerPC/varargs.ll +++ b/test/CodeGen/PowerPC/varargs.ll @@ -8,15 +8,16 @@ define i8* @test1(i8** %foo) nounwind { } ; P32: test1: -; P32: lwz r4, 0(r3) -; P32: addi r5, r4, 4 -; P32: stw r5, 0(r3) -; P32: lwz r3, 0(r4) -; P32: blr +; P32: lwz r2, 0(r3) +; P32: addi r4, r2, 4 +; P32: stw r4, 0(r3) +; P32: lwz r3, 0(r2) +; P32: blr ; P64: test1: -; P64: ld r4, 0(r3) -; P64: addi r5, r4, 8 -; P64: std r5, 0(r3) -; P64: ld r3, 0(r4) -; P64: blr +; P64: ld r2, 0(r3) +; P64: addi r4, r2, 8 +; P64: std r4, 0(r3) +; P64: ld r3, 0(r2) +; P64: blr + |