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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 17:07:03 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 17:07:03 +0000 |
commit | 92d098642d51513089f13ab4e3f26294b95316ae (patch) | |
tree | 206bfab521b1927cdfa233bf25b077cacc476a75 /test/CodeGen/PowerPC | |
parent | 4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028 (diff) | |
download | llvm-92d098642d51513089f13ab4e3f26294b95316ae.tar.gz llvm-92d098642d51513089f13ab4e3f26294b95316ae.tar.bz2 llvm-92d098642d51513089f13ab4e3f26294b95316ae.tar.xz |
Fix PowerPC tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128827 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC')
-rw-r--r-- | test/CodeGen/PowerPC/2010-05-03-retaddr1.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/indirectbr.ll | 14 |
2 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll b/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll index b10920a6c1..2a35d268a7 100644 --- a/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll +++ b/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=linearscan | FileCheck %s declare i8* @llvm.frameaddress(i32) nounwind readnone diff --git a/test/CodeGen/PowerPC/indirectbr.ll b/test/CodeGen/PowerPC/indirectbr.ll index 5122ab39d2..ac5662534d 100644 --- a/test/CodeGen/PowerPC/indirectbr.ll +++ b/test/CodeGen/PowerPC/indirectbr.ll @@ -43,13 +43,13 @@ L2: ; preds = %L3, %bb2 L1: ; preds = %L2, %bb2 %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1] -; PIC: addis r4, r4, ha16(Ltmp0-L0$pb) -; PIC: li r6, lo16(Ltmp0-L0$pb) -; PIC: add r4, r4, r6 -; PIC: stw r4 -; STATIC: li r5, lo16(Ltmp0) -; STATIC: addis r5, r5, ha16(Ltmp0) -; STATIC: stw r5 +; PIC: addis r[[R0:[0-9]+]], r{{[0-9]+}}, ha16(Ltmp0-L0$pb) +; PIC: li r[[R1:[0-9]+]], lo16(Ltmp0-L0$pb) +; PIC: add r[[R2:[0-9]+]], r[[R0]], r[[R1]] +; PIC: stw r[[R2]] +; STATIC: li r[[R0:[0-9]+]], lo16(Ltmp0) +; STATIC: addis r[[R0]], r[[R0]], ha16(Ltmp0) +; STATIC: stw r[[R0]] store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4 ret i32 %res.3 } |