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authorVincent Lejeune <vljn@ovi.com>2013-06-05 20:27:35 +0000
committerVincent Lejeune <vljn@ovi.com>2013-06-05 20:27:35 +0000
commit512119770e9c32eb0b9e6196ce51917fb2e30d9f (patch)
treea573723a7bf391be08c8752e3983de46215c7e3b /test/CodeGen/R600/fmul.ll
parent6ed30e0f0c3876df8b77c44fd3196b40903fb47d (diff)
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R600: Schedule copy from phys register at beginning of block
It allows regalloc pass to remove them by trivially assigning associated reg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/fmul.ll')
-rw-r--r--test/CodeGen/R600/fmul.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/R600/fmul.ll b/test/CodeGen/R600/fmul.ll
index fee5eadfdd..a40e818c12 100644
--- a/test/CodeGen/R600/fmul.ll
+++ b/test/CodeGen/R600/fmul.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
; CHECK: @fmul_f32
-; CHECK: MUL_IEEE * {{T[0-9]+\.[XYZW], PV\.[XYZW], PV\.[XYZW]}}
+; CHECK: MUL_IEEE * {{T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
define void @fmul_f32() {
%r0 = call float @llvm.R600.load.input(i32 0)