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author | Tom Stellard <thomas.stellard@amd.com> | 2013-06-03 17:39:43 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-06-03 17:39:43 +0000 |
commit | 132183510f3db502c7d837ee0dc40221b5c6245e (patch) | |
tree | 4d4ae24ae2752c6956a801a18e8e0a3022003f36 /test/CodeGen/R600/load.ll | |
parent | 4956bc61e1c86e781fd8abe14431c121d960d65b (diff) | |
download | llvm-132183510f3db502c7d837ee0dc40221b5c6245e.tar.gz llvm-132183510f3db502c7d837ee0dc40221b5c6245e.tar.bz2 llvm-132183510f3db502c7d837ee0dc40221b5c6245e.tar.xz |
R600/SI: Add support for global loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183131 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/load.ll')
-rw-r--r-- | test/CodeGen/R600/load.ll | 52 |
1 files changed, 49 insertions, 3 deletions
diff --git a/test/CodeGen/R600/load.ll b/test/CodeGen/R600/load.ll index b03245ae87..ff774ec922 100644 --- a/test/CodeGen/R600/load.ll +++ b/test/CodeGen/R600/load.ll @@ -1,8 +1,12 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s ; Load an i8 value from the global address space. -; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} +; R600-CHECK: @load_i8 +; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI-CHECK: @load_i8 +; SI-CHECK: BUFFER_LOAD_UBYTE VGPR{{[0-9]+}}, define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { %1 = load i8 addrspace(1)* %in %2 = zext i8 %1 to i32 @@ -10,9 +14,51 @@ define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { ret void } +; load an i32 value from the global address space. +; R600-CHECK: @load_i32 +; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 + +; SI-CHECK: @load_i32 +; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}} +define void @load_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { +entry: + %0 = load i32 addrspace(1)* %in + store i32 %0, i32 addrspace(1)* %out + ret void +} + +; load a f32 value from the global address space. +; R600-CHECK: @load_f32 +; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 + +; SI-CHECK: @load_f32 +; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}} +define void @load_f32(float addrspace(1)* %out, float addrspace(1)* %in) { +entry: + %0 = load float addrspace(1)* %in + store float %0, float addrspace(1)* %out + ret void +} + +; Load an i32 value from the constant address space. +; R600-CHECK: @load_const_addrspace_i32 +; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 + +; SI-CHECK: @load_const_addrspace_i32 +; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}} +define void @load_const_addrspace_i32(i32 addrspace(1)* %out, i32 addrspace(2)* %in) { +entry: + %0 = load i32 addrspace(2)* %in + store i32 %0, i32 addrspace(1)* %out + ret void +} + ; Load a f32 value from the constant address space. -; CHECK: VTX_READ_32 T{{[0-9]+\.X, T[0-9]+\.X}} +; R600-CHECK: @load_const_addrspace_f32 +; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 +; SI-CHECK: @load_const_addrspace_f32 +; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}} define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) { %1 = load float addrspace(2)* %in store float %1, float addrspace(1)* %out |