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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:35 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-23 01:48:35 +0000 |
| commit | eb643b9b37cf2b15249f43aa21ed25a71e71862c (patch) | |
| tree | 006463b81cde88ea6d5b25017aed11a6177eef79 /test/CodeGen/R600/load.ll | |
| parent | 20027547b98c0867fa92f3c18eddaa417f3f44da (diff) | |
| download | llvm-eb643b9b37cf2b15249f43aa21ed25a71e71862c.tar.gz llvm-eb643b9b37cf2b15249f43aa21ed25a71e71862c.tar.bz2 llvm-eb643b9b37cf2b15249f43aa21ed25a71e71862c.tar.xz | |
R600: Improve support for < 32-bit loads
Reviewed-by: Vincent Lejeune <vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186921 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/load.ll')
| -rw-r--r-- | test/CodeGen/R600/load.ll | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/test/CodeGen/R600/load.ll b/test/CodeGen/R600/load.ll index a1b15bd0b0..f36f20c63d 100644 --- a/test/CodeGen/R600/load.ll +++ b/test/CodeGen/R600/load.ll @@ -15,6 +15,51 @@ define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { ret void } +; R600-CHECK: @load_i8_sext +; R600-CHECK: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600-CHECK: 24 +; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600-CHECK: 24 +; SI-CHECK: @load_i8_sext +; SI-CHECK: BUFFER_LOAD_SBYTE +define void @load_i8_sext(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { +entry: + %0 = load i8 addrspace(1)* %in + %1 = sext i8 %0 to i32 + store i32 %1, i32 addrspace(1)* %out + ret void +} + +; Load an i16 value from the global address space. +; R600-CHECK: @load_i16 +; R600-CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}} +; SI-CHECK: @load_i16 +; SI-CHECK: BUFFER_LOAD_USHORT +define void @load_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) { +entry: + %0 = load i16 addrspace(1)* %in + %1 = zext i16 %0 to i32 + store i32 %1, i32 addrspace(1)* %out + ret void +} + +; R600-CHECK: @load_i16_sext +; R600-CHECK: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]] +; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]] +; R600-CHECK: 16 +; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]] +; R600-CHECK: 16 +; SI-CHECK: @load_i16_sext +; SI-CHECK: BUFFER_LOAD_SSHORT +define void @load_i16_sext(i32 addrspace(1)* %out, i16 addrspace(1)* %in) { +entry: + %0 = load i16 addrspace(1)* %in + %1 = sext i16 %0 to i32 + store i32 %1, i32 addrspace(1)* %out + ret void +} + ; load an i32 value from the global address space. ; R600-CHECK: @load_i32 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 |