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| author | Vincent Lejeune <vljn@ovi.com> | 2013-11-11 22:10:24 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-11-11 22:10:24 +0000 |
| commit | 70a7d5ddb4f00bbb61afe7b536c6f599f771ab9a (patch) | |
| tree | 0529d234345ee92bad998240c04c98c877ef0bee /test/CodeGen/R600/rv7x0_count3.ll | |
| parent | 6c7a7c6474ea60c40e2dbb15f5b6cf0265098ace (diff) | |
| download | llvm-70a7d5ddb4f00bbb61afe7b536c6f599f771ab9a.tar.gz llvm-70a7d5ddb4f00bbb61afe7b536c6f599f771ab9a.tar.bz2 llvm-70a7d5ddb4f00bbb61afe7b536c6f599f771ab9a.tar.xz | |
R600: Use function inputs to represent data stored in gpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194425 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/rv7x0_count3.ll')
| -rw-r--r-- | test/CodeGen/R600/rv7x0_count3.ll | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/test/CodeGen/R600/rv7x0_count3.ll b/test/CodeGen/R600/rv7x0_count3.ll index 474d6ba902..c3fd923e45 100644 --- a/test/CodeGen/R600/rv7x0_count3.ll +++ b/test/CodeGen/R600/rv7x0_count3.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rv710 | FileCheck %s -; CHECK: TEX 9 @4 ; encoding: [0x04,0x00,0x00,0x00,0x00,0x04,0x88,0x80] +; CHECK: TEX 9 @6 ; encoding: [0x06,0x00,0x00,0x00,0x00,0x04,0x88,0x80] -define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %1 = call float @llvm.R600.load.input(i32 4) - %2 = call float @llvm.R600.load.input(i32 5) - %3 = call float @llvm.R600.load.input(i32 6) - %4 = call float @llvm.R600.load.input(i32 7) +define void @test(<4 x float> inreg %reg0, <4 x float> inreg %reg1) #0 { + %1 = extractelement <4 x float> %reg1, i32 0 + %2 = extractelement <4 x float> %reg1, i32 1 + %3 = extractelement <4 x float> %reg1, i32 2 + %4 = extractelement <4 x float> %reg1, i32 3 %5 = insertelement <4 x float> undef, float %1, i32 0 %6 = insertelement <4 x float> %5, float %2, i32 1 %7 = insertelement <4 x float> %6, float %3, i32 2 @@ -36,9 +36,6 @@ define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) readnone -; Function Attrs: readnone -declare float @llvm.R600.load.input(i32) #1 - - declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) -attributes #1 = { readnone } + +attributes #0 = { "ShaderType"="1" } |