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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-05 13:11:52 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-07-05 13:11:52 +0000 |
commit | 47734db936bd3b434d60f9daee5b34bc722ee3ba (patch) | |
tree | 762d666959806fd85e031f0b5b0d336985c83bbd /test/CodeGen/SystemZ/frame-16.ll | |
parent | 61de142984aa6cb1acfe4725183193d04e437420 (diff) | |
download | llvm-47734db936bd3b434d60f9daee5b34bc722ee3ba.tar.gz llvm-47734db936bd3b434d60f9daee5b34bc722ee3ba.tar.bz2 llvm-47734db936bd3b434d60f9daee5b34bc722ee3ba.tar.xz |
[SystemZ] Allocate a second register scavenging slot
This is another prerequisite for frame-to-frame MVC copies.
I'll commit the patch that makes use of the slot separately.
The downside of trying to test many corner cases with each of the
available addressing modes is that a fair few tests need to account
for the new frame layout. I do still think it's useful to have all
these tests though, since it's something that wouldn't get much coverage
otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185698 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/frame-16.ll')
-rw-r--r-- | test/CodeGen/SystemZ/frame-16.ll | 126 |
1 files changed, 63 insertions, 63 deletions
diff --git a/test/CodeGen/SystemZ/frame-16.ll b/test/CodeGen/SystemZ/frame-16.ll index cc5529f920..dc67da93f2 100644 --- a/test/CodeGen/SystemZ/frame-16.ll +++ b/test/CodeGen/SystemZ/frame-16.ll @@ -16,9 +16,9 @@ ; First check the highest offset that is in range of the 12-bit form. ; -; The last in-range doubleword offset is 4088. Since the frame has an -; emergency spill slot at 160(%r15), the amount that we need to allocate -; in order to put another object at offset 4088 is 4088 - 168 = 3920 bytes. +; The last in-range doubleword offset is 4088. Since the frame has two +; emergency spill slots at 160(%r15), the amount that we need to allocate +; in order to put another object at offset 4088 is 4088 - 176 = 3912 bytes. define void @f1(i8 %byte) { ; CHECK-NOFP: f1: ; CHECK-NOFP: stc %r2, 4095(%r15) @@ -27,10 +27,10 @@ define void @f1(i8 %byte) { ; CHECK-FP: f1: ; CHECK-FP: stc %r2, 4095(%r11) ; CHECK-FP: br %r14 - %region1 = alloca [3920 x i8], align 8 - %region2 = alloca [3920 x i8], align 8 - %ptr1 = getelementptr inbounds [3920 x i8]* %region1, i64 0, i64 7 - %ptr2 = getelementptr inbounds [3920 x i8]* %region2, i64 0, i64 7 + %region1 = alloca [3912 x i8], align 8 + %region2 = alloca [3912 x i8], align 8 + %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 7 + %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 7 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -45,10 +45,10 @@ define void @f2(i8 %byte) { ; CHECK-FP: f2: ; CHECK-FP: stcy %r2, 4096(%r11) ; CHECK-FP: br %r14 - %region1 = alloca [3920 x i8], align 8 - %region2 = alloca [3920 x i8], align 8 - %ptr1 = getelementptr inbounds [3920 x i8]* %region1, i64 0, i64 8 - %ptr2 = getelementptr inbounds [3920 x i8]* %region2, i64 0, i64 8 + %region1 = alloca [3912 x i8], align 8 + %region2 = alloca [3912 x i8], align 8 + %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 8 + %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 8 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -57,7 +57,7 @@ define void @f2(i8 %byte) { ; Test the last offset that is in range of the 20-bit form. ; ; The last in-range doubleword offset is 524280, so by the same reasoning -; as above, we need to allocate objects of 524280 - 168 = 524122 bytes. +; as above, we need to allocate objects of 524280 - 176 = 524104 bytes. define void @f3(i8 %byte) { ; CHECK-NOFP: f3: ; CHECK-NOFP: stcy %r2, 524287(%r15) @@ -66,10 +66,10 @@ define void @f3(i8 %byte) { ; CHECK-FP: f3: ; CHECK-FP: stcy %r2, 524287(%r11) ; CHECK-FP: br %r14 - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 7 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 7 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 7 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 7 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -88,10 +88,10 @@ define void @f4(i8 %byte) { ; CHECK-FP: llilh %r1, 8 ; CHECK-FP: stc %r2, 0(%r1,%r11) ; CHECK-FP: br %r14 - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 8 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 8 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -109,10 +109,10 @@ define void @f5(i8 %byte) { ; CHECK-FP: llilh %r1, 8 ; CHECK-FP: stc %r2, 4095(%r1,%r11) ; CHECK-FP: br %r14 - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 4103 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 4103 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4103 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4103 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -129,10 +129,10 @@ define void @f6(i8 %byte) { ; CHECK-FP: llilh %r1, 8 ; CHECK-FP: stcy %r2, 4096(%r1,%r11) ; CHECK-FP: br %r14 - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 4104 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 4104 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4104 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4104 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -152,10 +152,10 @@ define void @f7(i8 %byte) { ; CHECK-FP: llilh %r1, 23 ; CHECK-FP: stcy %r2, 65535(%r1,%r11) ; CHECK-FP: br %r14 - %region1 = alloca [1048408 x i8], align 8 - %region2 = alloca [1048408 x i8], align 8 - %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524287 - %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524287 + %region1 = alloca [1048400 x i8], align 8 + %region2 = alloca [1048400 x i8], align 8 + %ptr1 = getelementptr inbounds [1048400 x i8]* %region1, i64 0, i64 524287 + %ptr2 = getelementptr inbounds [1048400 x i8]* %region2, i64 0, i64 524287 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -173,10 +173,10 @@ define void @f8(i8 %byte) { ; CHECK-FP: llilh %r1, 24 ; CHECK-FP: stc %r2, 7(%r1,%r11) ; CHECK-FP: br %r14 - %region1 = alloca [1048416 x i8], align 8 - %region2 = alloca [1048416 x i8], align 8 - %ptr1 = getelementptr inbounds [1048416 x i8]* %region1, i64 0, i64 524287 - %ptr2 = getelementptr inbounds [1048416 x i8]* %region2, i64 0, i64 524287 + %region1 = alloca [1048408 x i8], align 8 + %region2 = alloca [1048408 x i8], align 8 + %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524287 + %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524287 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void @@ -203,40 +203,40 @@ define void @f9(i8 %byte) { ; CHECK-FP: agfi [[R2]], 524288 ; CHECK-FP: stc %r2, 0([[R2]]) ; CHECK-FP: br %r14 - %region1 = alloca [1048416 x i8], align 8 - %region2 = alloca [1048416 x i8], align 8 - %ptr1 = getelementptr inbounds [1048416 x i8]* %region1, i64 0, i64 524288 - %ptr2 = getelementptr inbounds [1048416 x i8]* %region2, i64 0, i64 524288 + %region1 = alloca [1048408 x i8], align 8 + %region2 = alloca [1048408 x i8], align 8 + %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524288 + %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524288 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void } -; Repeat f4 in a case that needs the emergency spill slot (because all +; Repeat f4 in a case that needs the emergency spill slots (because all ; call-clobbered registers are live and no call-saved ones have been ; allocated). define void @f10(i32 *%vptr, i8 %byte) { ; CHECK-NOFP: f10: -; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], 160(%r15) +; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) ; CHECK-NOFP: llilh [[REGISTER]], 8 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) -; CHECK-NOFP: lg [[REGISTER]], 160(%r15) +; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: br %r14 ; ; CHECK-FP: f10: -; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], 160(%r11) +; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) ; CHECK-FP: llilh [[REGISTER]], 8 ; CHECK-FP: stc %r3, 0([[REGISTER]],%r11) -; CHECK-FP: lg [[REGISTER]], 160(%r11) +; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: br %r14 %i0 = load volatile i32 *%vptr %i1 = load volatile i32 *%vptr %i4 = load volatile i32 *%vptr %i5 = load volatile i32 *%vptr - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 8 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 8 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 store volatile i32 %i0, i32 *%vptr @@ -246,26 +246,26 @@ define void @f10(i32 *%vptr, i8 %byte) { ret void } -; And again with maximum register pressure. The only spill slot that the -; NOFP case needs is the emergency one, so the offsets are the same as for f4. +; And again with maximum register pressure. The only spill slots that the +; NOFP case needs are the emergency ones, so the offsets are the same as for f4. ; However, the FP case uses %r11 as the frame pointer and must therefore ; spill a second register. This leads to an extra displacement of 8. define void @f11(i32 *%vptr, i8 %byte) { ; CHECK-NOFP: f11: ; CHECK-NOFP: stmg %r6, %r15, -; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], 160(%r15) +; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) ; CHECK-NOFP: llilh [[REGISTER]], 8 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) -; CHECK-NOFP: lg [[REGISTER]], 160(%r15) +; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) ; CHECK-NOFP: lmg %r6, %r15, ; CHECK-NOFP: br %r14 ; ; CHECK-FP: f11: ; CHECK-FP: stmg %r6, %r15, -; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], 160(%r11) +; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) ; CHECK-FP: llilh [[REGISTER]], 8 ; CHECK-FP: stc %r3, 8([[REGISTER]],%r11) -; CHECK-FP: lg [[REGISTER]], 160(%r11) +; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) ; CHECK-FP: lmg %r6, %r15, ; CHECK-FP: br %r14 %i0 = load volatile i32 *%vptr @@ -281,10 +281,10 @@ define void @f11(i32 *%vptr, i8 %byte) { %i12 = load volatile i32 *%vptr %i13 = load volatile i32 *%vptr %i14 = load volatile i32 *%vptr - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 8 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 8 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 store volatile i32 %i0, i32 *%vptr @@ -316,11 +316,11 @@ define void @f12(i8 %byte, i64 %index) { ; CHECK-FP: agr %r1, %r11 ; CHECK-FP: stc %r2, 0(%r3,%r1) ; CHECK-FP: br %r14 - %region1 = alloca [524112 x i8], align 8 - %region2 = alloca [524112 x i8], align 8 + %region1 = alloca [524104 x i8], align 8 + %region2 = alloca [524104 x i8], align 8 %index1 = add i64 %index, 8 - %ptr1 = getelementptr inbounds [524112 x i8]* %region1, i64 0, i64 %index1 - %ptr2 = getelementptr inbounds [524112 x i8]* %region2, i64 0, i64 %index1 + %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 %index1 + %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 %index1 store volatile i8 %byte, i8 *%ptr1 store volatile i8 %byte, i8 *%ptr2 ret void |