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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-23 11:18:53 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-08-23 11:18:53 +0000 |
commit | 65ddcfa8c1c05aeecd9d4fb062bb121e376aaceb (patch) | |
tree | 284fe4e394f7d0a3a059c6c7fbddc7cf38ff0643 /test/CodeGen/SystemZ/int-const-06.ll | |
parent | a8a7099c1849fcbb4a68642a292fd0250aa46505 (diff) | |
download | llvm-65ddcfa8c1c05aeecd9d4fb062bb121e376aaceb.tar.gz llvm-65ddcfa8c1c05aeecd9d4fb062bb121e376aaceb.tar.bz2 llvm-65ddcfa8c1c05aeecd9d4fb062bb121e376aaceb.tar.xz |
[SystemZ] Prefer LHI;ST... over LAY;MV...
If we had a store of an integer to memory, and the integer and store size
were suitable for a form of MV..., we used MV... no matter what. We could
then have sequences like:
lay %r2, 0(%r3,%r4)
mvi 0(%r2), 4
In these cases it seems better to force the constant into a register
and use a normal store:
lhi %r2, 4
stc %r2, 0(%r3, %r4)
since %r2 is more likely to be hoisted and is easier to rematerialize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189098 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/int-const-06.ll')
-rw-r--r-- | test/CodeGen/SystemZ/int-const-06.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/SystemZ/int-const-06.ll b/test/CodeGen/SystemZ/int-const-06.ll index 12a555c61e..cf07c665dd 100644 --- a/test/CodeGen/SystemZ/int-const-06.ll +++ b/test/CodeGen/SystemZ/int-const-06.ll @@ -66,34 +66,34 @@ define void @f7(i64 *%a) { ret void } -; Check the next doubleword up, which needs separate address logic. -; Other sequences besides this one would be OK. +; Check the next doubleword up, which is out of range. We prefer STG +; in that case. define void @f8(i64 *%a) { ; CHECK-LABEL: f8: -; CHECK: aghi %r2, 4096 -; CHECK: mvghi 0(%r2), 42 +; CHECK: lghi [[TMP:%r[0-5]]], 42 +; CHECK: stg [[TMP]], 4096(%r2) ; CHECK: br %r14 %ptr = getelementptr i64 *%a, i64 512 store i64 42, i64 *%ptr ret void } -; Check negative displacements, which also need separate address logic. +; Check negative displacements, for which we again prefer STG. define void @f9(i64 *%a) { ; CHECK-LABEL: f9: -; CHECK: aghi %r2, -8 -; CHECK: mvghi 0(%r2), 42 +; CHECK: lghi [[TMP:%r[0-5]]], 42 +; CHECK: stg [[TMP]], -8(%r2) ; CHECK: br %r14 %ptr = getelementptr i64 *%a, i64 -1 store i64 42, i64 *%ptr ret void } -; Check that MVGHI does not allow an index +; Check that MVGHI does not allow an index. define void @f10(i64 %src, i64 %index) { ; CHECK-LABEL: f10: -; CHECK: agr %r2, %r3 -; CHECK: mvghi 0(%r2), 42 +; CHECK: lghi [[TMP:%r[0-5]]], 42 +; CHECK: stg [[TMP]], 0({{%r2,%r3|%r3,%r2}}) ; CHECK: br %r14 %add = add i64 %src, %index %ptr = inttoptr i64 %add to i64 * |