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| author | Bob Wilson <bob.wilson@apple.com> | 2011-01-07 04:59:04 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2011-01-07 04:59:04 +0000 |
| commit | 5e8b833707e6d59576d91b23a2c24e596eace60e (patch) | |
| tree | 93a69003f2b97be2b2b36c809e06d0fb3e933653 /test/CodeGen/Thumb2/thumb2-spill-q.ll | |
| parent | 67b067d2f91ede565a3cde857442a44314d72537 (diff) | |
| download | llvm-5e8b833707e6d59576d91b23a2c24e596eace60e.tar.gz llvm-5e8b833707e6d59576d91b23a2c24e596eace60e.tar.bz2 llvm-5e8b833707e6d59576d91b23a2c24e596eace60e.tar.xz | |
Add ARM patterns to match EXTRACT_SUBVECTOR nodes.
Also fix an off-by-one in SelectionDAGBuilder that was preventing shuffle
vectors from being translated to EXTRACT_SUBVECTOR.
Patch by Tim Northover.
The test changes are needed to keep those spill-q tests from testing aligned
spills and restores. If the only aligned stack objects are spill slots, we
no longer realign the stack frame. Prior to this patch, an EXTRACT_SUBVECTOR
was legalized by loading from the stack, which created an aligned frame index.
Now, however, there is nothing except the spill slot in the stack frame, so
I added an aligned alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122995 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Thumb2/thumb2-spill-q.ll')
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-spill-q.ll | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll index 0d73fba93e..d9a0617f5a 100644 --- a/test/CodeGen/Thumb2/thumb2-spill-q.ll +++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll @@ -15,7 +15,10 @@ define void @aaa(%quuz* %this, i8* %block) { ; CHECK: vst1.64 {{.*}}[{{.*}}, :128] ; CHECK: vld1.64 {{.*}}[{{.*}}, :128] entry: - %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] + %aligned_vec = alloca <4 x float>, align 16 + %"alloca point" = bitcast i32 0 to i32 + %vecptr = bitcast <4 x float>* %aligned_vec to i8* + %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %vecptr, i32 1) nounwind store float 6.300000e+01, float* undef, align 4 %1 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef, i32 1) nounwind ; <<4 x float>> [#uses=1] store float 0.000000e+00, float* undef, align 4 |