Remove arm_apcscc from the test files. It is the default and doing this

matches what llvm-gcc and clang now produce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8

41 files changed, 164 insertions, 164 deletions

diff --git a/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll b/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll
index 8f2283f748..76ffe2a18f 100644
--- a/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll
+++ b/test/CodeGen/Thumb2/2009-07-17-CrossRegClassCopy.ll
@@ -4,9 +4,9 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
 target triple = "thumbv6t2-elf"
 	%struct.dwarf_cie = type <{ i32, i32, i8, [0 x i8], [3 x i8] }>
 
-declare arm_apcscc i8* @read_sleb128(i8*, i32* nocapture) nounwind
+declare i8* @read_sleb128(i8*, i32* nocapture) nounwind
 
-define arm_apcscc i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
+define i32 @get_cie_encoding(%struct.dwarf_cie* %cie) nounwind {
 entry:
 	br i1 undef, label %bb1, label %bb13
 
@@ -27,7 +27,7 @@ read_uleb128.exit:		; preds = %bb.i
 	%.sum40 = add i32 %indvar.i, undef		; <i32> [#uses=1]
 	%.sum31 = add i32 %.sum40, 2		; <i32> [#uses=1]
 	%scevgep.i = getelementptr %struct.dwarf_cie* %cie, i32 0, i32 3, i32 %.sum31		; <i8*> [#uses=1]
-	%3 = call arm_apcscc  i8* @read_sleb128(i8* %scevgep.i, i32* undef)		; <i8*> [#uses=0]
+	%3 = call  i8* @read_sleb128(i8* %scevgep.i, i32* undef)		; <i8*> [#uses=0]
 	unreachable
 
 bb13:		; preds = %entry
diff --git a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
index ef076a46ae..4e1394ff27 100644
--- a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
+++ b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
@@ -3,7 +3,7 @@
 
 @"\01LC" = external constant [36 x i8], align 1		; <[36 x i8]*> [#uses=1]
 
-define arm_apcscc i32 @t(i32, ...) nounwind {
+define i32 @t(i32, ...) nounwind {
 entry:
 ; CHECK: t:
 ; CHECK: add r7, sp, #12
@@ -24,7 +24,7 @@ entry:
 	%15 = sext i8 %6 to i32		; <i32> [#uses=2]
 	%16 = sext i16 %10 to i32		; <i32> [#uses=2]
 	%17 = sext i16 %13 to i32		; <i32> [#uses=2]
-	%18 = call arm_apcscc  i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind		; <i32> [#uses=0]
+	%18 = call  i32 (i8*, ...)* @printf(i8* getelementptr ([36 x i8]* @"\01LC", i32 0, i32 0), i32 -128, i32 0, i32 %15, i32 %16, i32 %17, i32 0, i32 %14) nounwind		; <i32> [#uses=0]
 	%19 = add i32 0, %15		; <i32> [#uses=1]
 	%20 = add i32 %19, %16		; <i32> [#uses=1]
 	%21 = add i32 %20, %14		; <i32> [#uses=1]
@@ -33,4 +33,4 @@ entry:
 	ret i32 %23
 }
 
-declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
+declare i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll b/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll
index 4d21f9ba63..43573662d9 100644
--- a/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll
+++ b/test/CodeGen/Thumb2/2009-07-23-CPIslandBug.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+vfp2,+thumb2
 ; rdar://7083961
 
-define arm_apcscc i32 @value(i64 %b1, i64 %b2) nounwind readonly {
+define i32 @value(i64 %b1, i64 %b2) nounwind readonly {
 entry:
 	%0 = icmp eq i32 undef, 0		; <i1> [#uses=1]
 	%mod.0.ph.ph = select i1 %0, float -1.000000e+00, float 1.000000e+00		; <float> [#uses=1]
diff --git a/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll b/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll
index f74d12ed27..3e07618989 100644
--- a/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll
+++ b/test/CodeGen/Thumb2/2009-07-30-PEICrash.ll
@@ -28,7 +28,7 @@
 	%struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
 	%struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
 
-define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
+define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
 entry:
 	%workspace = alloca [64 x float], align 4		; <[64 x float]*> [#uses=11]
 	%0 = load i8** undef, align 4		; <i8*> [#uses=5]
diff --git a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
index a8e86d55e7..095aecce9e 100644
--- a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
+++ b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
@@ -6,7 +6,7 @@
 @lefline = external global [100 x [20 x i32]]		; <[100 x [20 x i32]]*> [#uses=1]
 @sep = external global [20 x i32]		; <[20 x i32]*> [#uses=1]
 
-define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
+define void @main(i32 %argc, i8** %argv) noreturn nounwind {
 ; CHECK: main:
 ; CHECK: ldrb
 entry:
diff --git a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll
index 6cbfd0d8d4..41b30291ba 100644
--- a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll
+++ b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll
@@ -22,9 +22,9 @@
 	%"struct.xalanc_1_8::XalanDOMString" = type { %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", i32 }
 	%"struct.xalanc_1_8::XalanOutputStream" = type { i32 (...)**, i32, %"struct.std::basic_ostream<char,std::char_traits<char> >.base"*, i32, %"struct.std::vector<short unsigned int,std::allocator<short unsigned int> >", %"struct.xalanc_1_8::XalanDOMString", i8, i8, %"struct.std::CharVectorType" }
 
-declare arm_apcscc void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
+declare void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"*)
 
-define arm_apcscc void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
+define void @_ZN10xalanc_1_814FormatterToXML5cdataEPKtj(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length) {
 entry:
 	%0 = getelementptr %"struct.xalanc_1_8::FormatterToXML"* %this, i32 0, i32 13		; <i8*> [#uses=1]
 	br i1 undef, label %bb4, label %bb
@@ -36,11 +36,11 @@ bb:		; preds = %entry
 	%3 = getelementptr i32 (...)** %2, i32 11		; <i32 (...)**> [#uses=1]
 	%4 = load i32 (...)** %3, align 4		; <i32 (...)*> [#uses=1]
 	%5 = bitcast i32 (...)* %4 to void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)*		; <void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32)*> [#uses=1]
-	tail call arm_apcscc  void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
+	tail call  void %5(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 %length)
 	ret void
 
 bb4:		; preds = %entry
-	tail call arm_apcscc  void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
-	tail call arm_apcscc  void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
+	tail call  void @_ZN10xalanc_1_814FormatterToXML17writeParentTagEndEv(%"struct.xalanc_1_8::FormatterToXML"* %this)
+	tail call  void undef(%"struct.xalanc_1_8::FormatterToXML"* %this, i16* %ch, i32 0, i32 %length, i8 zeroext undef)
 	ret void
 }
diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
index 9c1fdb32e8..b832637392 100644
--- a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll
@@ -28,17 +28,17 @@
 @.str1822946 = external constant [8 x i8], align 1		; <[8 x i8]*> [#uses=1]
 @.str1842948 = external constant [11 x i8], align 1		; <[11 x i8]*> [#uses=1]
 
-declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
+declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
 
-declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
+declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
 
-declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
+declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
 
-declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
+declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
 
-declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
+declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
 
-define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
+define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
 entry:
 	br label %bb5
 
@@ -49,7 +49,7 @@ bb5:		; preds = %bb5, %entry
 	br i1 undef, label %bb5, label %bb6
 
 bb6:		; preds = %bb5
-	%0 = call arm_apcscc  %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind		; <%struct.FILE*> [#uses=1]
+	%0 = call  %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext 0, %struct.rec** undef, %struct.FILE_POS* null, i32* undef) nounwind		; <%struct.FILE*> [#uses=1]
 	br i1 false, label %bb.i, label %FontHalfXHeight.exit
 
 bb.i:		; preds = %bb6
@@ -67,22 +67,22 @@ FontSize.exit:		; preds = %bb.i1, %FontHalfXHeight.exit
 	br i1 %2, label %bb.i5, label %FontName.exit
 
 bb.i5:		; preds = %FontSize.exit
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
 	br label %FontName.exit
 
 FontName.exit:		; preds = %bb.i5, %FontSize.exit
-	%3 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind		; <i32> [#uses=0]
-	%4 = call arm_apcscc  i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind		; <i32> [#uses=0]
+	%3 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %1, i8* undef) nounwind		; <i32> [#uses=0]
+	%4 = call  i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind		; <i32> [#uses=0]
 	%5 = sub i32 %colmark, undef		; <i32> [#uses=1]
 	%6 = sub i32 %rowmark, undef		; <i32> [#uses=1]
 	%7 = load %struct.FILE** @out_fp, align 4		; <%struct.FILE*> [#uses=1]
-	%8 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind		; <i32> [#uses=0]
+	%8 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %7, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %5, i32 %6) nounwind		; <i32> [#uses=0]
 	store i32 0, i32* @cpexists, align 4
 	%9 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 1		; <i32*> [#uses=1]
 	%10 = load i32* %9, align 4		; <i32> [#uses=1]
 	%11 = sub i32 0, %10		; <i32> [#uses=1]
 	%12 = load %struct.FILE** @out_fp, align 4		; <%struct.FILE*> [#uses=1]
-	%13 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind		; <i32> [#uses=0]
+	%13 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %12, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %11) nounwind		; <i32> [#uses=0]
 	store i32 0, i32* @cpexists, align 4
 	br label %bb100.outer.outer
 
@@ -132,7 +132,7 @@ bb2.i41:		; preds = %bb2.i41, %StringBeginsWith.exit55
 	br label %bb2.i41
 
 bb2.i.i15.critedge:		; preds = %bb.i47
-	%16 = call arm_apcscc  i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind		; <i8*> [#uses=0]
+	%16 = call  i8* @fgets(i8* undef, i32 512, %struct.FILE* %0) nounwind		; <i8*> [#uses=0]
 	%iftmp.560.0 = select i1 undef, i32 2, i32 0		; <i32> [#uses=1]
 	br label %bb100.outer
 
diff --git a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
index 317db64ae4..02fad4b930 100644
--- a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll
@@ -55,25 +55,25 @@
 @.str1872951 = external constant [17 x i8], align 1		; <[17 x i8]*> [#uses=1]
 @.str1932957 = external constant [26 x i8], align 1		; <[26 x i8]*> [#uses=1]
 
-declare arm_apcscc i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
+declare i32 @fprintf(%struct.FILE* nocapture, i8* nocapture, ...) nounwind
 
-declare arm_apcscc i32 @"\01_fwrite"(i8*, i32, i32, i8*)
+declare i32 @"\01_fwrite"(i8*, i32, i32, i8*)
 
-declare arm_apcscc i32 @remove(i8* nocapture) nounwind
+declare i32 @remove(i8* nocapture) nounwind
 
-declare arm_apcscc %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
+declare %struct.FILE* @OpenIncGraphicFile(i8*, i8 zeroext, %struct.rec** nocapture, %struct.FILE_POS*, i32* nocapture) nounwind
 
-declare arm_apcscc %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
+declare %struct.rec* @MakeWord(i32, i8* nocapture, %struct.FILE_POS*) nounwind
 
-declare arm_apcscc void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
+declare void @Error(i32, i32, i8*, i32, %struct.FILE_POS*, ...) nounwind
 
-declare arm_apcscc i32 @"\01_fputs"(i8*, %struct.FILE*)
+declare i32 @"\01_fputs"(i8*, %struct.FILE*)
 
-declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+declare noalias i8* @calloc(i32, i32) nounwind
 
-declare arm_apcscc i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
+declare i8* @fgets(i8*, i32, %struct.FILE* nocapture) nounwind
 
-define arm_apcscc void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
+define void @PS_PrintGraphicInclude(%struct.rec* %x, i32 %colmark, i32 %rowmark) nounwind {
 entry:
 	%buff = alloca [512 x i8], align 4		; <[512 x i8]*> [#uses=5]
 	%0 = getelementptr %struct.rec* %x, i32 0, i32 0, i32 1, i32 0, i32 0		; <i8*> [#uses=2]
@@ -94,7 +94,7 @@ bb1:		; preds = %bb, %entry
 	br i1 %8, label %bb2, label %bb3
 
 bb2:		; preds = %bb1
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([40 x i8]* @.str1802944, i32 0, i32 0)) nounwind
 	br label %bb3
 
 bb3:		; preds = %bb2, %bb1
@@ -108,7 +108,7 @@ bb5:		; preds = %bb5, %bb3
 bb6:		; preds = %bb5
 	%10 = load i8* %0, align 4		; <i8> [#uses=1]
 	%11 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 1, i32 0		; <%struct.FILE_POS*> [#uses=1]
-	%12 = call arm_apcscc  %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind		; <%struct.FILE*> [#uses=4]
+	%12 = call  %struct.FILE* @OpenIncGraphicFile(i8* undef, i8 zeroext %10, %struct.rec** null, %struct.FILE_POS* %11, i32* undef) nounwind		; <%struct.FILE*> [#uses=4]
 	br i1 false, label %bb7, label %bb8
 
 bb7:		; preds = %bb6
@@ -124,7 +124,7 @@ bb9:		; preds = %bb8
 	br i1 %15, label %bb.i, label %FontHalfXHeight.exit
 
 bb.i:		; preds = %bb9
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([17 x i8]* @.str111875, i32 0, i32 0)) nounwind
 	%.pre186 = load i32* @currentfont, align 4		; <i32> [#uses=1]
 	br label %FontHalfXHeight.exit
 
@@ -139,7 +139,7 @@ bb1.i:		; preds = %bb.i1, %FontHalfXHeight.exit
 	br i1 undef, label %bb2.i, label %FontSize.exit
 
 bb2.i:		; preds = %bb1.i
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 37, i32 61, i8* getelementptr ([30 x i8]* @.str101874, i32 0, i32 0), i32 1, %struct.FILE_POS* null) nounwind
 	unreachable
 
 FontSize.exit:		; preds = %bb1.i
@@ -151,35 +151,35 @@ FontSize.exit:		; preds = %bb1.i
 	br i1 %21, label %bb.i5, label %FontName.exit
 
 bb.i5:		; preds = %FontSize.exit
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 1, i32 2, i8* getelementptr ([20 x i8]* @.str24239, i32 0, i32 0), i32 0, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*), i8* getelementptr ([10 x i8]* @.str81872, i32 0, i32 0)) nounwind
 	br label %FontName.exit
 
 FontName.exit:		; preds = %bb.i5, %FontSize.exit
 	%22 = phi %struct.FONT_INFO* [ undef, %bb.i5 ], [ undef, %FontSize.exit ]		; <%struct.FONT_INFO*> [#uses=1]
 	%23 = getelementptr %struct.FONT_INFO* %22, i32 %19, i32 5		; <%struct.rec**> [#uses=0]
-	%24 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind		; <i32> [#uses=0]
+	%24 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([8 x i8]* @.str1822946, i32 0, i32 0), i32 %18, i8* null) nounwind		; <i32> [#uses=0]
 	br label %bb10
 
 bb10:		; preds = %FontName.exit, %bb8
-	%25 = call arm_apcscc  i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind		; <i32> [#uses=0]
+	%25 = call  i32 @"\01_fwrite"(i8* getelementptr ([11 x i8]* @.str1842948, i32 0, i32 0), i32 1, i32 10, i8* undef) nounwind		; <i32> [#uses=0]
 	%26 = sub i32 %rowmark, undef		; <i32> [#uses=1]
 	%27 = load %struct.FILE** @out_fp, align 4		; <%struct.FILE*> [#uses=1]
-	%28 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind		; <i32> [#uses=0]
+	%28 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %27, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 undef, i32 %26) nounwind		; <i32> [#uses=0]
 	store i32 0, i32* @cpexists, align 4
-	%29 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind		; <i32> [#uses=0]
+	%29 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([17 x i8]* @.str192782, i32 0, i32 0), double 2.000000e+01, double 2.000000e+01) nounwind		; <i32> [#uses=0]
 	%30 = getelementptr %struct.rec* %y.0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0		; <i32*> [#uses=1]
 	%31 = load i32* %30, align 4		; <i32> [#uses=1]
 	%32 = sub i32 0, %31		; <i32> [#uses=1]
 	%33 = load i32* undef, align 4		; <i32> [#uses=1]
 	%34 = sub i32 0, %33		; <i32> [#uses=1]
 	%35 = load %struct.FILE** @out_fp, align 4		; <%struct.FILE*> [#uses=1]
-	%36 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind		; <i32> [#uses=0]
+	%36 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %35, i8* getelementptr ([17 x i8]* @.str212784, i32 0, i32 0), i32 %32, i32 %34) nounwind		; <i32> [#uses=0]
 	store i32 0, i32* @cpexists, align 4
 	%37 = load %struct.rec** null, align 4		; <%struct.rec*> [#uses=1]
 	%38 = getelementptr %struct.rec* %37, i32 0, i32 0, i32 4		; <%struct.FOURTH_UNION*> [#uses=1]
-	%39 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind		; <i32> [#uses=0]
+	%39 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* undef, i8* getelementptr ([23 x i8]* @.str1852949, i32 0, i32 0), %struct.FOURTH_UNION* %38) nounwind		; <i32> [#uses=0]
 	%buff14 = getelementptr [512 x i8]* %buff, i32 0, i32 0		; <i8*> [#uses=5]
-	%40 = call arm_apcscc  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
+	%40 = call  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
 	%iftmp.506.0 = select i1 undef, i32 2, i32 0		; <i32> [#uses=1]
 	%41 = getelementptr [512 x i8]* %buff, i32 0, i32 26		; <i8*> [#uses=1]
 	br label %bb100.outer.outer
@@ -230,7 +230,7 @@ bb3.i77:		; preds = %bb2.i75, %StringBeginsWith.exit88
 	br i1 %50, label %bb24, label %bb2.i.i68
 
 bb24:		; preds = %bb3.i77
-	%51 = call arm_apcscc  %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind		; <%struct.rec*> [#uses=0]
+	%51 = call  %struct.rec* @MakeWord(i32 11, i8* %41, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind		; <%struct.rec*> [#uses=0]
 	%52 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4		; <i8> [#uses=1]
 	%53 = zext i8 %52 to i32		; <i32> [#uses=2]
 	%54 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %53		; <%struct.rec**> [#uses=2]
@@ -245,7 +245,7 @@ bb.i56:		; preds = %bb27
 	br i1 undef, label %bb1.i58, label %bb2.i60
 
 bb1.i58:		; preds = %bb.i56
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
 	br label %bb2.i60
 
 bb2.i60:		; preds = %bb1.i58, %bb.i56
@@ -287,7 +287,7 @@ bb37:		; preds = %bb35
 	br label %bb41
 
 bb41:		; preds = %bb37, %bb35
-	%61 = call arm_apcscc  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=1]
+	%61 = call  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=1]
 	%62 = icmp eq i8* %61, null		; <i1> [#uses=1]
 	%iftmp.554.0 = select i1 %62, i32 2, i32 1		; <i32> [#uses=1]
 	br label %bb100.outer
@@ -342,11 +342,11 @@ bb2.i6.i26:		; preds = %bb2.i6.i26, %StringBeginsWith.exit.i20
 	br i1 undef, label %bb2.i6.i26, label %bb55
 
 bb55:		; preds = %bb2.i6.i26
-	%69 = call arm_apcscc  i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind		; <i32> [#uses=0]
+	%69 = call  i32 @"\01_fputs"(i8* %buff14, %struct.FILE* undef) nounwind		; <i32> [#uses=0]
 	unreachable
 
 bb58:		; preds = %StringBeginsWith.exit.i20
-	%70 = call arm_apcscc  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
+	%70 = call  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
 	%iftmp.560.0 = select i1 undef, i32 2, i32 0		; <i32> [#uses=1]
 	br label %bb100.outer
 
@@ -367,7 +367,7 @@ StringBeginsWith.exit:		; preds = %StringBeginsWith.exitthread-split, %bb3.i
 	br i1 %phitmp93, label %bb66, label %bb2.i.i
 
 bb66:		; preds = %StringBeginsWith.exit
-	%71 = call arm_apcscc  %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind		; <%struct.rec*> [#uses=4]
+	%71 = call  %struct.rec* @MakeWord(i32 11, i8* undef, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind		; <%struct.rec*> [#uses=4]
 	%72 = load i8* getelementptr ([150 x i8]* @zz_lengths, i32 0, i32 0), align 4		; <i8> [#uses=1]
 	%73 = zext i8 %72 to i32		; <i32> [#uses=2]
 	%74 = getelementptr [524 x %struct.rec*]* @zz_free, i32 0, i32 %73		; <%struct.rec**> [#uses=2]
@@ -379,13 +379,13 @@ bb69:		; preds = %bb66
 	br i1 undef, label %bb.i2, label %GetMemory.exit
 
 bb.i2:		; preds = %bb69
-	%77 = call arm_apcscc  noalias i8* @calloc(i32 1020, i32 4) nounwind		; <i8*> [#uses=1]
+	%77 = call  noalias i8* @calloc(i32 1020, i32 4) nounwind		; <i8*> [#uses=1]
 	%78 = bitcast i8* %77 to i8**		; <i8**> [#uses=3]
 	store i8** %78, i8*** @next_free.4772, align 4
 	br i1 undef, label %bb1.i3, label %bb2.i4
 
 bb1.i3:		; preds = %bb.i2
-	call arm_apcscc  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
+	call  void (i32, i32, i8*, i32, %struct.FILE_POS*, ...)* @Error(i32 31, i32 1, i8* getelementptr ([32 x i8]* @.str1575, i32 0, i32 0), i32 1, %struct.FILE_POS* bitcast (%4* @no_file_pos to %struct.FILE_POS*)) nounwind
 	br label %bb2.i4
 
 bb2.i4:		; preds = %bb1.i3, %bb.i2
@@ -482,7 +482,7 @@ bb91:		; preds = %strip_out.exit, %bb.i2.i
 	unreachable
 
 bb94:		; preds = %strip_out.exit, %StringBeginsWith.exit.i
-	%96 = call arm_apcscc  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
+	%96 = call  i8* @fgets(i8* %buff14, i32 512, %struct.FILE* %12) nounwind		; <i8*> [#uses=0]
 	unreachable
 
 bb100.outer:		; preds = %bb58, %bb41, %bb100.outer.outer
@@ -497,12 +497,12 @@ bb101.split:		; preds = %bb100.outer
 	br i1 %97, label %bb103, label %bb102
 
 bb102:		; preds = %bb101.split
-	%98 = call arm_apcscc  i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind		; <i32> [#uses=0]
+	%98 = call  i32 @remove(i8* getelementptr ([9 x i8]* @.str19294, i32 0, i32 0)) nounwind		; <i32> [#uses=0]
 	unreachable
 
 bb103:		; preds = %bb101.split
 	%99 = load %struct.FILE** @out_fp, align 4		; <%struct.FILE*> [#uses=1]
-	%100 = call arm_apcscc  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind		; <i32> [#uses=0]
+	%100 = call  i32 (%struct.FILE*, i8*, ...)* @fprintf(%struct.FILE* %99, i8* getelementptr ([26 x i8]* @.str1932957, i32 0, i32 0)) nounwind		; <i32> [#uses=0]
 	store i32 0, i32* @wordcount, align 4
 	ret void
 }
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
index 2bbc231f96..bfea003fb4 100644
--- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll
@@ -8,7 +8,7 @@
 	%struct.Results = type { float, float, float }
 	%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
 
-define arm_apcscc void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
+define void @get_results(%struct.Results* noalias nocapture sret %agg.result, %struct.Village* %village) nounwind {
 entry:
 	br i1 undef, label %bb, label %bb6.preheader
 
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
index 8294484766..9d4fc313cf 100644
--- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll
@@ -6,7 +6,7 @@
 	%struct.Patient = type { i32, i32, i32, %struct.Village* }
 	%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
 
-define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+define %struct.List* @sim(%struct.Village* %village) nounwind {
 entry:
 	br i1 undef, label %bb14, label %bb3.preheader
 
diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
index b18c972aed..ad32dc9d0a 100644
--- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
@@ -6,7 +6,7 @@
 	%struct.Patient = type { i32, i32, i32, %struct.Village* }
 	%struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
 
-define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+define %struct.List* @sim(%struct.Village* %village) nounwind {
 entry:
 	br i1 undef, label %bb14, label %bb3.preheader
 
diff --git a/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll b/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
index 96bcbad771..f3baeb74e2 100644
--- a/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
+++ b/test/CodeGen/Thumb2/2009-08-07-NeonFPBug.ll
@@ -28,7 +28,7 @@
 	%struct.jvirt_barray_control = type { [64 x i16]**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_barray_control*, %struct.backing_store_info }
 	%struct.jvirt_sarray_control = type { i8**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.jvirt_sarray_control*, %struct.backing_store_info }
 
-define arm_apcscc void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
+define void @jpeg_idct_float(%struct.jpeg_decompress_struct* nocapture %cinfo, %struct.jpeg_component_info* nocapture %compptr, i16* nocapture %coef_block, i8** nocapture %output_buf, i32 %output_col) nounwind {
 entry:
 	br label %bb
 
diff --git a/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll b/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll
index cbe250b6df..974ce50d6d 100644
--- a/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll
+++ b/test/CodeGen/Thumb2/2009-08-10-ISelBug.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+vfp2
 
-define arm_apcscc float @t1(i32 %v0) nounwind {
+define float @t1(i32 %v0) nounwind {
 entry:
 	store i32 undef, i32* undef, align 4
 	%0 = load [4 x i8]** undef, align 4		; <[4 x i8]*> [#uses=1]
diff --git a/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
index 8d03b52e75..b2ed8fc7a6 100644
--- a/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
+++ b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll
@@ -4,7 +4,7 @@
 
 @getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; <void (i32, i32, i32, i32, %struct.pix_pos*)**> [#uses=2]
 
-define arm_apcscc void @t() nounwind {
+define void @t() nounwind {
 ; CHECK: t:
 ; CHECK:      it eq
 ; CHECK-NEXT: cmpeq
@@ -47,12 +47,12 @@ if.then1992:                                      ; preds = %for.body1940
   %tmp14.i302 = load i32* undef                   ; <i32> [#uses=4]
   %add.i307452 = or i32 %shl1959, 1               ; <i32> [#uses=1]
   %sub.i308 = add i32 %shl, -1                    ; <i32> [#uses=4]
-  call arm_apcscc  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
+  call  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 %shl1959, i32 0, %struct.pix_pos* undef) nounwind
   %tmp49.i309 = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
-  call arm_apcscc  void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
+  call  void %tmp49.i309(i32 %tmp14.i302, i32 %sub.i308, i32 %add.i307452, i32 0, %struct.pix_pos* null) nounwind
   %tmp49.1.i = load void (i32, i32, i32, i32, %struct.pix_pos*)** @getNeighbour ; <void (i32, i32, i32, i32, %struct.pix_pos*)*> [#uses=1]
-  call arm_apcscc  void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
-  call arm_apcscc  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
+  call  void %tmp49.1.i(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.2.i) nounwind
+  call  void undef(i32 %tmp14.i302, i32 %sub.i308, i32 undef, i32 0, %struct.pix_pos* %arrayidx56.3.i) nounwind
   unreachable
 
 if.else2003:                                      ; preds = %for.body1940
diff --git a/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
index 216f3e3f9c..4588018539 100644
--- a/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
+++ b/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
 
-define arm_apcscc void @get_initial_mb16x16_cost() nounwind {
+define void @get_initial_mb16x16_cost() nounwind {
 entry:
   br i1 undef, label %bb4, label %bb1
 
diff --git a/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
index 9f2e399dbe..956263b4fe 100644
--- a/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
+++ b/test/CodeGen/Thumb2/2009-11-11-ScavengerAssert.ll
@@ -3,9 +3,9 @@
 %struct.OP = type { %struct.OP*, %struct.OP*, %struct.OP* ()*, i32, i16, i16, i8, i8 }
 %struct.SV = type { i8*, i32, i32 }
 
-declare arm_apcscc void @Perl_mg_set(%struct.SV*) nounwind
+declare void @Perl_mg_set(%struct.SV*) nounwind
 
-define arm_apcscc %struct.OP* @Perl_pp_complement() nounwind {
+define %struct.OP* @Perl_pp_complement() nounwind {
 entry:
   %0 = load %struct.SV** null, align 4            ; <%struct.SV*> [#uses=2]
   br i1 undef, label %bb21, label %bb5
@@ -23,7 +23,7 @@ bb7:                                              ; preds = %bb6
   %4 = bitcast i8* %3 to i32*                     ; <i32*> [#uses=1]
   %5 = load i32* %4, align 4                      ; <i32> [#uses=1]
   %storemerge5 = xor i32 %5, -1                   ; <i32> [#uses=1]
-  call arm_apcscc  void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
+  call  void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
   %6 = getelementptr inbounds %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
   %7 = load i32* %6, align 4                      ; <i32> [#uses=1]
   %8 = and i32 %7, 16384                          ; <i32> [#uses=1]
@@ -34,7 +34,7 @@ bb8:                                              ; preds = %bb6
   unreachable
 
 bb11:                                             ; preds = %bb7
-  call arm_apcscc  void @Perl_mg_set(%struct.SV* undef) nounwind
+  call  void @Perl_mg_set(%struct.SV* undef) nounwind
   br label %bb12
 
 bb12:                                             ; preds = %bb11, %bb7
@@ -42,11 +42,11 @@ bb12:                                             ; preds = %bb11, %bb7
   br label %bb44
 
 bb13:                                             ; preds = %bb5
-  %10 = call arm_apcscc  i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
+  %10 = call  i32 @Perl_sv_2uv(%struct.SV* %0) nounwind ; <i32> [#uses=0]
   br i1 undef, label %bb.i, label %bb1.i
 
 bb.i:                                             ; preds = %bb13
-  call arm_apcscc  void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
+  call  void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwind
   br label %Perl_sv_setuv.exit
 
 bb1.i:                                            ; preds = %bb13
@@ -60,7 +60,7 @@ Perl_sv_setuv.exit:                               ; preds = %bb1.i, %bb.i
   br i1 %14, label %bb20, label %bb19
 
 bb19:                                             ; preds = %Perl_sv_setuv.exit
-  call arm_apcscc  void @Perl_mg_set(%struct.SV* undef) nounwind
+  call  void @Perl_mg_set(%struct.SV* undef) nounwind
   br label %bb20
 
 bb20:                                             ; preds = %bb19, %Perl_sv_setuv.exit
@@ -80,6 +80,6 @@ bb44:                                             ; preds = %bb20, %bb12
   ret %struct.OP* undef
 }
 
-declare arm_apcscc void @Perl_sv_setiv(%struct.SV*, i32) nounwind
+declare void @Perl_sv_setiv(%struct.SV*, i32) nounwind
 
-declare arm_apcscc i32 @Perl_sv_2uv(%struct.SV*) nounwind
+declare i32 @Perl_sv_2uv(%struct.SV*) nounwind
diff --git a/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
index 8a67bb1958..0c9fa5efa0 100644
--- a/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
+++ b/test/CodeGen/Thumb2/2009-11-13-STRDBug.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin10
 ; rdar://7394794
 
-define arm_apcscc void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
+define void @lshift_double(i64 %l1, i64 %h1, i64 %count, i32 %prec, i64* nocapture %lv, i64* nocapture %hv, i32 %arith) nounwind {
 entry:
   %..i = select i1 false, i64 0, i64 0            ; <i64> [#uses=1]
   br i1 undef, label %bb11.i, label %bb6.i
diff --git a/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
index 79ad0a9126..8ca001c7d7 100644
--- a/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
+++ b/test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
@@ -1,7 +1,7 @@
 ; RUN: opt < %s -std-compile-opts | \
 ; RUN:   llc -mtriple=thumbv7-apple-darwin10 -mattr=+neon | FileCheck %s
 
-define arm_apcscc void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
+define void @fred(i32 %three_by_three, i8* %in, double %dt1, i32 %x_size, i32 %y_size, i8* %bp) nounwind {
 entry:
 ; -- The loop following the load should only use a single add-literation
 ;    instruction.
@@ -45,7 +45,7 @@ entry:
   store i8* %bp, i8** %bp_addr
   %0 = load i8** %in_addr, align 4                ; <i8*> [#uses=1]
   store i8* %0, i8** %out, align 4
-  %1 = call arm_apcscc  i32 (...)* @foo() nounwind ; <i32> [#uses=1]
+  %1 = call  i32 (...)* @foo() nounwind ; <i32> [#uses=1]
   store i32 %1, i32* %i, align 4
   %2 = load i32* %three_by_three_addr, align 4    ; <i32> [#uses=1]
   %3 = icmp eq i32 %2, 0                          ; <i1> [#uses=1]
@@ -76,7 +76,7 @@ bb3:                                              ; preds = %bb2, %bb
   %15 = load i32* %n_max, align 4                 ; <i32> [#uses=1]
   %16 = load i32* %n_max, align 4                 ; <i32> [#uses=1]
   %17 = mul i32 %15, %16                          ; <i32> [#uses=1]
-  %18 = call arm_apcscc  noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
+  %18 = call  noalias i8* @malloc(i32 %17) nounwind ; <i8*> [#uses=1]
   store i8* %18, i8** %dp, align 4
   %19 = load i8** %dp, align 4                    ; <i8*> [#uses=1]
   store i8* %19, i8** %dpt, align 4
@@ -123,6 +123,6 @@ return:                                           ; preds = %bb6
   ret void
 }
 
-declare arm_apcscc i32 @foo(...)
+declare i32 @foo(...)
 
-declare arm_apcscc noalias i8* @malloc(i32) nounwind
+declare noalias i8* @malloc(i32) nounwind
diff --git a/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll
index 07a35277b8..af7d716446 100644
--- a/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll
+++ b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll
@@ -17,14 +17,14 @@ target triple = "thumbv7-apple-darwin10"
 @_ZN3WTFL12thread_heapsE = internal global %"struct.WTF::TCMalloc_ThreadCache"* null ; <%"struct.WTF::TCMalloc_ThreadCache"**> [#uses=1]
 @llvm.used = appending global [1 x i8*] [i8* bitcast (%"struct.WTF::TCMalloc_ThreadCache"* ()* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
 
-define arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
+define %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache22CreateCacheIfNecessaryEv() nounwind {
 entry:
-  %0 = tail call arm_apcscc  i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
+  %0 = tail call  i32 @pthread_mutex_lock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
   %.b24 = load i1* @_ZN3WTFL10tsd_initedE.b, align 4 ; <i1> [#uses=1]
   br i1 %.b24, label %bb5, label %bb6
 
 bb5:                                              ; preds = %entry
-  %1 = tail call arm_apcscc  %struct._opaque_pthread_t* @pthread_self() nounwind
+  %1 = tail call  %struct._opaque_pthread_t* @pthread_self() nounwind
   br label %bb6
 
 bb6:                                              ; preds = %bb5, %entry
@@ -34,7 +34,7 @@ bb6:                                              ; preds = %bb5, %entry
 bb7:                                              ; preds = %bb11
   %2 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %h.0, i32 0, i32 1
   %3 = load %struct._opaque_pthread_t** %2, align 4
-  %4 = tail call arm_apcscc  i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
+  %4 = tail call  i32 @pthread_equal(%struct._opaque_pthread_t* %3, %struct._opaque_pthread_t* %me.0) nounwind
   %5 = icmp eq i32 %4, 0
   br i1 %5, label %bb10, label %bb14
 
@@ -49,12 +49,12 @@ bb11:                                             ; preds = %bb10, %bb6
   br i1 %7, label %bb13, label %bb7
 
 bb13:                                             ; preds = %bb11
-  %8 = tail call arm_apcscc  %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
+  %8 = tail call  %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t* %me.0) nounwind
   br label %bb14
 
 bb14:                                             ; preds = %bb13, %bb7
   %heap.1 = phi %"struct.WTF::TCMalloc_ThreadCache"* [ %8, %bb13 ], [ %h.0, %bb7 ] ; <%"struct.WTF::TCMalloc_ThreadCache"*> [#uses=4]
-  %9 = tail call arm_apcscc  i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
+  %9 = tail call  i32 @pthread_mutex_unlock(%struct.PlatformMutex* getelementptr inbounds (%struct.SpinLock* @_ZN3WTFL13pageheap_lockE, i32 0, i32 0)) nounwind
   %10 = getelementptr inbounds %"struct.WTF::TCMalloc_ThreadCache"* %heap.1, i32 0, i32 2
   %11 = load i8* %10, align 4
   %toBool15not = icmp eq i8 %11, 0                ; <i1> [#uses=1]
@@ -68,22 +68,22 @@ bb21:                                             ; preds = %bb19
   store i8 1, i8* %10, align 4
   %12 = load i32* @_ZN3WTFL8heap_keyE, align 4
   %13 = bitcast %"struct.WTF::TCMalloc_ThreadCache"* %heap.1 to i8*
-  %14 = tail call arm_apcscc  i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
+  %14 = tail call  i32 @pthread_setspecific(i32 %12, i8* %13) nounwind
   ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
 
 bb22:                                             ; preds = %bb19, %bb14
   ret %"struct.WTF::TCMalloc_ThreadCache"* %heap.1
 }
 
-declare arm_apcscc i32 @pthread_mutex_lock(%struct.PlatformMutex*)
+declare i32 @pthread_mutex_lock(%struct.PlatformMutex*)
 
-declare arm_apcscc i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
+declare i32 @pthread_mutex_unlock(%struct.PlatformMutex*)
 
-declare hidden arm_apcscc %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
+declare hidden %"struct.WTF::TCMalloc_ThreadCache"* @_ZN3WTF20TCMalloc_ThreadCache7NewHeapEP17_opaque_pthread_t(%struct._opaque_pthread_t*) nounwind
 
-declare arm_apcscc i32 @pthread_setspecific(i32, i8*)
+declare i32 @pthread_setspecific(i32, i8*)
 
-declare arm_apcscc %struct._opaque_pthread_t* @pthread_self()
+declare %struct._opaque_pthread_t* @pthread_self()
 
-declare arm_apcscc i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
+declare i32 @pthread_equal(%struct._opaque_pthread_t*, %struct._opaque_pthread_t*)
 
diff --git a/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
index 41682c1054..771a4f8136 100644
--- a/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
+++ b/test/CodeGen/Thumb2/2010-01-19-RemovePredicates.ll
@@ -6,16 +6,16 @@
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 target triple = "thumbv7-apple-darwin10"
 
-declare arm_apcscc void @etoe53(i16* nocapture, i16* nocapture) nounwind
+declare void @etoe53(i16* nocapture, i16* nocapture) nounwind
 
-define arm_apcscc void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
+define void @earith(double* nocapture %value, i32 %icode, double* nocapture %r1, double* nocapture %r2) nounwind {
 entry:
   %v = alloca [6 x i16], align 4                  ; <[6 x i16]*> [#uses=1]
   br i1 undef, label %bb2.i, label %bb5
 
 bb2.i:                                            ; preds = %entry
   %0 = bitcast double* %value to i16*             ; <i16*> [#uses=1]
-  call arm_apcscc  void @etoe53(i16* null, i16* %0) nounwind
+  call  void @etoe53(i16* null, i16* %0) nounwind
   ret void
 
 bb5:                                              ; preds = %entry
@@ -48,6 +48,6 @@ bb35:                                             ; preds = %bb5
 bb46:                                             ; preds = %bb26, %bb10
   %1 = bitcast double* %value to i16*             ; <i16*> [#uses=1]
   %v47 = getelementptr inbounds [6 x i16]* %v, i32 0, i32 0 ; <i16*> [#uses=1]
-  call arm_apcscc  void @etoe53(i16* %v47, i16* %1) nounwind
+  call  void @etoe53(i16* %v47, i16* %1) nounwind
   ret void
 }
diff --git a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
index 363f5719d1..c153092288 100644
--- a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
+++ b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 
-define arm_apcscc i32 @test(i32 %n) nounwind {
+define i32 @test(i32 %n) nounwind {
 ; CHECK: test:
 ; CHECK-NOT: mov
 ; CHECK: return
@@ -16,11 +16,11 @@ bb.nph:                                           ; preds = %entry
 bb:                                               ; preds = %bb.nph, %bb
   %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
   %u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1]
-  %1 = tail call arm_apcscc  i32 @f() nounwind    ; <i32> [#uses=1]
+  %1 = tail call  i32 @f() nounwind    ; <i32> [#uses=1]
   %tmp4 = zext i32 %1 to i64                      ; <i64> [#uses=1]
   %mask = and i64 %u.05, -4294967296              ; <i64> [#uses=1]
   %ins = or i64 %tmp4, %mask                      ; <i64> [#uses=2]
-  tail call arm_apcscc  void @g(i64 %ins) nounwind
+  tail call  void @g(i64 %ins) nounwind
   %indvar.next = add i32 %indvar, 1               ; <i32> [#uses=2]
   %exitcond = icmp eq i32 %indvar.next, %tmp      ; <i1> [#uses=1]
   br i1 %exitcond, label %return, label %bb
@@ -29,7 +29,7 @@ return:                                           ; preds = %bb, %entry
   ret i32 undef
 }
 
-define arm_apcscc i32 @test_dead_cycle(i32 %n) nounwind {
+define i32 @test_dead_cycle(i32 %n) nounwind {
 ; CHECK: test_dead_cycle:
 ; CHECK: blx
 ; CHECK-NOT: mov
@@ -50,11 +50,11 @@ bb:                                               ; preds = %bb.nph, %bb2
   br i1 %1, label %bb1, label %bb2
 
 bb1:                                              ; preds = %bb
-  %2 = tail call arm_apcscc  i32 @f() nounwind    ; <i32> [#uses=1]
+  %2 = tail call  i32 @f() nounwind    ; <i32> [#uses=1]
   %tmp6 = zext i32 %2 to i64                      ; <i64> [#uses=1]
   %mask = and i64 %u.17, -4294967296              ; <i64> [#uses=1]
   %ins = or i64 %tmp6, %mask                      ; <i64> [#uses=1]
-  tail call arm_apcscc  void @g(i64 %ins) nounwind
+  tail call  void @g(i64 %ins) nounwind
   br label %bb2
 
 bb2:                                              ; preds = %bb1, %bb
@@ -71,6 +71,6 @@ return:                                           ; preds = %bb2, %entry
   ret i32 undef
 }
 
-declare arm_apcscc i32 @f()
+declare i32 @f()
 
-declare arm_apcscc void @g(i64)
+declare void @g(i64)
diff --git a/test/CodeGen/Thumb2/2010-02-24-BigStack.ll b/test/CodeGen/Thumb2/2010-02-24-BigStack.ll
index 533546bb19..2b53747f99 100644
--- a/test/CodeGen/Thumb2/2010-02-24-BigStack.ll
+++ b/test/CodeGen/Thumb2/2010-02-24-BigStack.ll
@@ -4,7 +4,7 @@
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 target triple = "thumbv7-apple-darwin3.0.0-iphoneos"
 
-define arm_apcscc void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
+define void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin_RES_TDEL) {
 entry:
   %panelTDEL.addr = alloca double*, align 4       ; <double**> [#uses=1]
   %panelResTDEL = alloca [2560 x double], align 4 ; <[2560 x double]*> [#uses=0]
diff --git a/test/CodeGen/Thumb2/2010-03-08-addi12-ccout.ll b/test/CodeGen/Thumb2/2010-03-08-addi12-ccout.ll
index 54f4122d32..7ce3c25866 100644
--- a/test/CodeGen/Thumb2/2010-03-08-addi12-ccout.ll
+++ b/test/CodeGen/Thumb2/2010-03-08-addi12-ccout.ll
@@ -2,13 +2,13 @@
 
 @.str41196 = external constant [2 x i8], align 4  ; <[2 x i8]*> [#uses=1]
 
-declare arm_apcscc void @syStopraw(i32) nounwind
+declare void @syStopraw(i32) nounwind
 
-declare arm_apcscc i32 @SyFopen(i8*, i8*) nounwind
+declare i32 @SyFopen(i8*, i8*) nounwind
 
-declare arm_apcscc i8* @SyFgets(i8*, i32) nounwind
+declare i8* @SyFgets(i8*, i32) nounwind
 
-define arm_apcscc void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
+define void @SyHelp(i8* nocapture %topic, i32 %fin) nounwind {
 entry:
   %line = alloca [256 x i8], align 4              ; <[256 x i8]*> [#uses=1]
   %secname = alloca [1024 x i8], align 4          ; <[1024 x i8]*> [#uses=0]
@@ -70,7 +70,7 @@ bb163:                                            ; preds = %bb162, %bb161
   unreachable
 
 bb224:                                            ; preds = %bb162
-  %0 = call arm_apcscc  i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; <i32> [#uses=2]
+  %0 = call  i32 @SyFopen(i8* undef, i8* getelementptr inbounds ([2 x i8]* @.str41196, i32 0, i32 0)) nounwind ; <i32> [#uses=2]
   br i1 false, label %bb297, label %bb300
 
 bb297:                                            ; preds = %bb224
@@ -177,7 +177,7 @@ bb369:                                            ; preds = %bb368, %bb356
   br i1 undef, label %bb373, label %bb388
 
 bb373:                                            ; preds = %bb383, %bb369
-  %7 = call arm_apcscc  i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=1]
+  %7 = call  i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=1]
   %8 = icmp eq i8* %7, null                       ; <i1> [#uses=1]
   br i1 %8, label %bb375, label %bb383
 
@@ -241,7 +241,7 @@ bb405:                                            ; preds = %bb404, %bb403
   br i1 undef, label %return, label %bb406
 
 bb406:                                            ; preds = %bb405
-  call arm_apcscc  void @syStopraw(i32 %fin) nounwind
+  call  void @syStopraw(i32 %fin) nounwind
   ret void
 
 bb407:                                            ; preds = %bb404
@@ -255,7 +255,7 @@ bb428:                                            ; preds = %bb407
   br label %bb440
 
 bb440:                                            ; preds = %bb428, %bb300
-  %13 = call arm_apcscc  i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=0]
+  %13 = call  i8* @SyFgets(i8* undef, i32 %0) nounwind ; <i8*> [#uses=0]
   br i1 false, label %bb442, label %bb308
 
 bb442:                                            ; preds = %bb440
diff --git a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
index 71ff68aabe..7ee19863de 100644
--- a/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
+++ b/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
@@ -13,7 +13,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-
 ; CHECK: InlineAsm End
 ; CHECK: cmp
 ; CHECK: beq
-define arm_apcscc void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
+define void @test(%s1* %this, i32 %format, i32 %w, i32 %h, i32 %levels, i32* %s, i8* %data, i32* nocapture %rowbytes, void (i8*, i8*)* %release, i8* %info) nounwind {
 entry:
   %tmp1 = getelementptr inbounds %s1* %this, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0
   volatile store i32 1, i32* %tmp1, align 4
@@ -32,9 +32,9 @@ entry:
   %tmp19 = getelementptr inbounds %s1* %this, i32 0, i32 10
   store i64 0, i64* %tmp19, align 4
   %tmp20 = getelementptr inbounds %s1* %this, i32 0, i32 0
-  tail call arm_apcscc  void @f1(%s3* %tmp20, i32* %s) nounwind
+  tail call  void @f1(%s3* %tmp20, i32* %s) nounwind
   %tmp21 = shl i32 %format, 6
-  %tmp22 = tail call arm_apcscc  zeroext i8 @f2(i32 %format) nounwind
+  %tmp22 = tail call  zeroext i8 @f2(i32 %format) nounwind
   %toBoolnot = icmp eq i8 %tmp22, 0
   %tmp23 = zext i1 %toBoolnot to i32
   %flags.0 = or i32 %tmp23, %tmp21
@@ -59,5 +59,5 @@ return:
   ret void
 }
 
-declare arm_apcscc void @f1(%s3*, i32*)
-declare arm_apcscc zeroext i8 @f2(i32)
+declare void @f1(%s3*, i32*)
+declare zeroext i8 @f2(i32)
diff --git a/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
index fea2dca6a2..3f1b9eb8d9 100644
--- a/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
+++ b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll
@@ -4,7 +4,7 @@
 ; Make sure the result of the first dynamic_alloc isn't copied back to sp more
 ; than once. We'll deal with poor codegen later.
 
-define arm_apcscc void @t() nounwind ssp {
+define void @t() nounwind ssp {
 entry:
 ; CHECK: t:
 ; CHECK: mov r0, sp
diff --git a/test/CodeGen/Thumb2/2010-04-26-CopyRegCrash.ll b/test/CodeGen/Thumb2/2010-04-26-CopyRegCrash.ll
index 950b67e6a5..3be016fbd1 100644
--- a/test/CodeGen/Thumb2/2010-04-26-CopyRegCrash.ll
+++ b/test/CodeGen/Thumb2/2010-04-26-CopyRegCrash.ll
@@ -4,7 +4,7 @@
 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
 target triple = "thumbv7-apple-darwin10"
 
-define arm_apcscc void @test(i32 %mode) nounwind optsize noinline {
+define void @test(i32 %mode) nounwind optsize noinline {
 entry:
   br i1 undef, label %return, label %bb3
 
diff --git a/test/CodeGen/Thumb2/2010-05-24-rsbs.ll b/test/CodeGen/Thumb2/2010-05-24-rsbs.ll
index 7a40aa950c..e72d542b31 100644
--- a/test/CodeGen/Thumb2/2010-05-24-rsbs.ll
+++ b/test/CodeGen/Thumb2/2010-05-24-rsbs.ll
@@ -2,7 +2,7 @@
 ; Radar 8017376: Missing 's' suffix for t2RSBS instructions.
 ; CHECK: rsbs
 
-define arm_apcscc i64 @test(i64 %x) nounwind readnone {
+define i64 @test(i64 %x) nounwind readnone {
 entry:
   %0 = sub nsw i64 1, %x                          ; <i64> [#uses=1]
   ret i64 %0
diff --git a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
index 62c5790b39..26750065af 100644
--- a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
+++ b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
@@ -12,7 +12,7 @@ target triple = "thumbv7-apple-darwin10"
 
 @.str = private constant [7 x i8] c"%g %g\0A\00", align 4 ; <[7 x i8]*> [#uses=1]
 
-define arm_apcscc i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
+define i32 @main(i32 %argc, i8** nocapture %Argv) nounwind {
 entry:
   %0 = icmp eq i32 %argc, 2123                    ; <i1> [#uses=1]
   %U.0 = select i1 %0, double 3.282190e+01, double 8.731834e+02 ; <double> [#uses=2]
@@ -31,11 +31,11 @@ entry:
   %tmp7 = extractelement <2 x double> %5, i32 0   ; <double> [#uses=1]
   %tmp5 = extractelement <2 x double> %5, i32 1   ; <double> [#uses=1]
 ; CHECK: printf
-  %7 = tail call arm_apcscc  i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; <i32> [#uses=0]
+  %7 = tail call  i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp7, double %tmp5) nounwind ; <i32> [#uses=0]
   %tmp3 = extractelement <2 x double> %6, i32 0   ; <double> [#uses=1]
   %tmp1 = extractelement <2 x double> %6, i32 1   ; <double> [#uses=1]
-  %8 = tail call arm_apcscc  i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; <i32> [#uses=0]
+  %8 = tail call  i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), double %tmp3, double %tmp1) nounwind ; <i32> [#uses=0]
   ret i32 0
 }
 
-declare arm_apcscc i32 @printf(i8* nocapture, ...) nounwind
+declare i32 @printf(i8* nocapture, ...) nounwind
diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll
index 572f1e8975..c71c3ca576 100644
--- a/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll
+++ b/test/CodeGen/Thumb2/cross-rc-coalescing-1.ll
@@ -4,9 +4,9 @@
 %struct.__sFILEX = type opaque
 %struct.__sbuf = type { i8*, i32 }
 
-declare arm_apcscc i32 @fgetc(%struct.FILE* nocapture) nounwind
+declare i32 @fgetc(%struct.FILE* nocapture) nounwind
 
-define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
 entry:
   br i1 undef, label %bb, label %bb1
 
@@ -20,7 +20,7 @@ bb.i1:                                            ; preds = %bb1
   unreachable
 
 bb1.i2:                                           ; preds = %bb1
-  %0 = call arm_apcscc  i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0]
+  %0 = call  i32 @fgetc(%struct.FILE* undef) nounwind ; <i32> [#uses=0]
   br i1 undef, label %bb2.i3, label %bb3.i4
 
 bb2.i3:                                           ; preds = %bb1.i2
diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
index 6c453499a4..583f4057bc 100644
--- a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
+++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | grep vmov.f32 | count 1
 
-define arm_apcscc void @fht(float* nocapture %fz, i16 signext %n) nounwind {
+define void @fht(float* nocapture %fz, i16 signext %n) nounwind {
 entry:
   br label %bb5
 
diff --git a/test/CodeGen/Thumb2/frameless.ll b/test/CodeGen/Thumb2/frameless.ll
index c3c8cf1dd1..fa8d5d87df 100644
--- a/test/CodeGen/Thumb2/frameless.ll
+++ b/test/CodeGen/Thumb2/frameless.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -disable-fp-elim | not grep mov
 ; RUN: llc < %s -mtriple=thumbv7-linux -disable-fp-elim | not grep mov
 
-define arm_apcscc void @t() nounwind readnone {
+define void @t() nounwind readnone {
   ret void
 }
diff --git a/test/CodeGen/Thumb2/frameless2.ll b/test/CodeGen/Thumb2/frameless2.ll
index 7cc7b19142..c5d3239026 100644
--- a/test/CodeGen/Thumb2/frameless2.ll
+++ b/test/CodeGen/Thumb2/frameless2.ll
@@ -3,7 +3,7 @@
 %struct.noise3 = type { [3 x [17 x i32]] }
 %struct.noiseguard = type { i32, i32, i32 }
 
-define arm_apcscc void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
+define void @vorbis_encode_noisebias_setup(i8* nocapture %vi.0.7.val, double %s, i32 %block, i32* nocapture %suppress, %struct.noise3* nocapture %in, %struct.noiseguard* nocapture %guard, double %userbias) nounwind {
 entry:
   %0 = getelementptr %struct.noiseguard* %guard, i32 %block, i32 2; <i32*> [#uses=1]
   %1 = load i32* %0, align 4                      ; <i32> [#uses=1]
diff --git a/test/CodeGen/Thumb2/ifcvt-neon.ll b/test/CodeGen/Thumb2/ifcvt-neon.ll
index c667909e3c..6832053969 100644
--- a/test/CodeGen/Thumb2/ifcvt-neon.ll
+++ b/test/CodeGen/Thumb2/ifcvt-neon.ll
@@ -4,7 +4,7 @@
 @a = common global float 0.000000e+00             ; <float*> [#uses=2]
 @b = common global float 0.000000e+00             ; <float*> [#uses=1]
 
-define arm_apcscc float @t(i32 %c) nounwind {
+define float @t(i32 %c) nounwind {
 entry:
   %0 = icmp sgt i32 %c, 1                         ; <i1> [#uses=1]
   %1 = load float* @a, align 4                    ; <float> [#uses=2]
diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll
index 55cdac983b..b444b29483 100644
--- a/test/CodeGen/Thumb2/ldr-str-imm12.ll
+++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll
@@ -20,7 +20,7 @@
 @zz_hold = external global %union.rec*            ; <%union.rec**> [#uses=2]
 @zz_res = external global %union.rec*             ; <%union.rec**> [#uses=1]
 
-define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
+define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
 entry:
 ; CHECK:       ldr.w	r9, [r7, #28]
   %xgaps.i = alloca [32 x %union.rec*], align 4   ; <[32 x %union.rec*]*> [#uses=0]
@@ -56,7 +56,7 @@ bb420:                                            ; preds = %bb20, %bb20
   store %union.rec* null, %union.rec** @zz_hold, align 4
   store %union.rec* null, %union.rec** @zz_res, align 4
   store %union.rec* %x, %union.rec** @zz_hold, align 4
-  %0 = call arm_apcscc  %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
+  %0 = call  %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
   unreachable
 
 bb438:                                            ; preds = %bb20, %bb20
diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll
index 2038606aa8..7fa782f91d 100644
--- a/test/CodeGen/Thumb2/lsr-deficiency.ll
+++ b/test/CodeGen/Thumb2/lsr-deficiency.ll
@@ -11,7 +11,7 @@
 @G = external global i32                          ; <i32*> [#uses=2]
 @array = external global i32*                     ; <i32**> [#uses=1]
 
-define arm_apcscc void @t() nounwind optsize {
+define void @t() nounwind optsize {
 ; CHECK: t:
 ; CHECK: mov.w r2, #1000
 entry:
diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll
index 98acc2803f..203565d244 100644
--- a/test/CodeGen/Thumb2/machine-licm.ll
+++ b/test/CodeGen/Thumb2/machine-licm.ll
@@ -8,7 +8,7 @@
 
 @GV = external global i32                         ; <i32*> [#uses=2]
 
-define arm_apcscc void @t1(i32* nocapture %vals, i32 %c) nounwind {
+define void @t1(i32* nocapture %vals, i32 %c) nounwind {
 entry:
 ; CHECK: t1:
 ; CHECK: cbz
@@ -52,7 +52,7 @@ return:                                           ; preds = %bb, %entry
 }
 
 ; rdar://8001136
-define arm_apcscc void @t2(i8* %ptr1, i8* %ptr2) nounwind {
+define void @t2(i8* %ptr1, i8* %ptr2) nounwind {
 entry:
 ; CHECK: t2:
 ; CHECK: adr r{{.}}, #LCPI1_0
diff --git a/test/CodeGen/Thumb2/pic-load.ll b/test/CodeGen/Thumb2/pic-load.ll
index 1f8aea912f..35a03e7773 100644
--- a/test/CodeGen/Thumb2/pic-load.ll
+++ b/test/CodeGen/Thumb2/pic-load.ll
@@ -5,7 +5,7 @@
 @__dso_handle = external global { }		; <{ }*> [#uses=1]
 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata"		; <[1 x i8*]*> [#uses=0]
 
-define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
+define hidden i32 @atexit(void ()* %func) nounwind {
 entry:
 ; CHECK: atexit:
 ; CHECK: add r0, pc
@@ -14,8 +14,8 @@ entry:
 	store void ()* %func, void ()** %0, align 4
 	%1 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 1		; <i32*> [#uses=1]
 	store i32 0, i32* %1, align 4
-	%2 = call arm_apcscc  i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind		; <i32> [#uses=1]
+	%2 = call  i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind		; <i32> [#uses=1]
 	ret i32 %2
 }
 
-declare arm_apcscc i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
+declare i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
diff --git a/test/CodeGen/Thumb2/sign_extend_inreg.ll b/test/CodeGen/Thumb2/sign_extend_inreg.ll
index 9a02c1caeb..520c730df1 100644
--- a/test/CodeGen/Thumb2/sign_extend_inreg.ll
+++ b/test/CodeGen/Thumb2/sign_extend_inreg.ll
@@ -3,7 +3,7 @@
 
 target triple = "thumbv7-apple-darwin10"
 
-define arm_apcscc i32 @f1(i16* %ptr) nounwind {
+define i32 @f1(i16* %ptr) nounwind {
 ; CHECK-A8: f1
 ; CHECK-A8: sxth
 ; CHECK-M3: f1
diff --git a/test/CodeGen/Thumb2/thumb2-cbnz.ll b/test/CodeGen/Thumb2/thumb2-cbnz.ll
index 0fc6899e14..4f4c9af850 100644
--- a/test/CodeGen/Thumb2/thumb2-cbnz.ll
+++ b/test/CodeGen/Thumb2/thumb2-cbnz.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
 ; rdar://7354379
 
-declare arm_apcscc double @floor(double) nounwind readnone
+declare double @floor(double) nounwind readnone
 
 define void @t(i1 %a, double %b) {
 entry:
@@ -23,7 +23,7 @@ bb9:                                              ; preds = %bb7
 ; CHECK:      cmp r0, #0
 ; CHECK-NEXT: cmp r0, #0
 ; CHECK-NEXT: cbnz
-  %0 = tail call arm_apcscc  double @floor(double %b) nounwind readnone ; <double> [#uses=0]
+  %0 = tail call  double @floor(double %b) nounwind readnone ; <double> [#uses=0]
   br label %bb11
 
 bb11:                                             ; preds = %bb9, %bb7
diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll
index bf9c052156..3946371709 100644
--- a/test/CodeGen/Thumb2/thumb2-spill-q.ll
+++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll
@@ -9,7 +9,7 @@
 
 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*) nounwind readonly
 
-define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
+define void @aaa(%quuz* %this, i8* %block) {
 ; CHECK: aaa:
 ; CHECK: bic r4, r4, #15
 ; CHECK: vst1.64 {{.*}}[{{.*}}, :128]
diff --git a/test/CodeGen/Thumb2/thumb2-tbh.ll b/test/CodeGen/Thumb2/thumb2-tbh.ll
index 2cf1d6a2af..cd9c8e1015 100644
--- a/test/CodeGen/Thumb2/thumb2-tbh.ll
+++ b/test/CodeGen/Thumb2/thumb2-tbh.ll
@@ -8,13 +8,13 @@
 @.str31 = external constant [28 x i8], align 1		; <[28 x i8]*> [#uses=1]
 @_T_gtol = external global %struct._T_tstr*		; <%struct._T_tstr**> [#uses=2]
 
-declare arm_apcscc i32 @strlen(i8* nocapture) nounwind readonly
+declare i32 @strlen(i8* nocapture) nounwind readonly
 
-declare arm_apcscc void @Z_fatal(i8*) noreturn nounwind
+declare void @Z_fatal(i8*) noreturn nounwind
 
-declare arm_apcscc noalias i8* @calloc(i32, i32) nounwind
+declare noalias i8* @calloc(i32, i32) nounwind
 
-define arm_apcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
 ; CHECK: main:
 ; CHECK: tbb
 entry:
@@ -28,39 +28,39 @@ bb5.i:		; preds = %bb42.i
 	br label %bb40.i
 
 bb7.i:		; preds = %bb42.i
-	call arm_apcscc  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
+	call  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
 	unreachable
 
 bb15.i:		; preds = %bb42.i
-	call arm_apcscc  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
+	call  void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
 	unreachable
 
 bb23.i:		; preds = %bb42.i
-	%1 = call arm_apcscc  i32 @strlen(i8* null) nounwind readonly		; <i32> [#uses=0]
+	%1 = call  i32 @strlen(i8* null) nounwind readonly		; <i32> [#uses=0]
 	unreachable
 
 bb33.i:		; preds = %bb42.i
 	store i32 0, i32* @_C_nextcmd, align 4
-	%2 = call arm_apcscc  noalias i8* @calloc(i32 21, i32 1) nounwind		; <i8*> [#uses=0]
+	%2 = call  noalias i8* @calloc(i32 21, i32 1) nounwind		; <i8*> [#uses=0]
 	unreachable
 
 bb34.i:		; preds = %bb42.i
 	%3 = load i32* @_C_nextcmd, align 4		; <i32> [#uses=1]
 	%4 = add i32 %3, 1		; <i32> [#uses=1]
 	store i32 %4, i32* @_C_nextcmd, align 4
-	%5 = call arm_apcscc  noalias i8* @calloc(i32 22, i32 1) nounwind		; <i8*> [#uses=0]
+	%5 = call  noalias i8* @calloc(i32 22, i32 1) nounwind		; <i8*> [#uses=0]
 	unreachable
 
 bb35.i:		; preds = %bb42.i
-	%6 = call arm_apcscc  noalias i8* @calloc(i32 20, i32 1) nounwind		; <i8*> [#uses=0]
+	%6 = call  noalias i8* @calloc(i32 20, i32 1) nounwind		; <i8*> [#uses=0]
 	unreachable
 
 bb37.i:		; preds = %bb42.i
-	%7 = call arm_apcscc  noalias i8* @calloc(i32 14, i32 1) nounwind		; <i8*> [#uses=0]
+	%7 = call  noalias i8* @calloc(i32 14, i32 1) nounwind		; <i8*> [#uses=0]
 	unreachable
 
 bb39.i:		; preds = %bb42.i
-	call arm_apcscc  void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
+	call  void @Z_fatal(i8* getelementptr ([28 x i8]* @.str31, i32 0, i32 0)) nounwind
 	unreachable
 
 bb40.i:		; preds = %bb42.i, %bb5.i, %bb1.i2
@@ -81,4 +81,4 @@ bb42.i:		; preds = %bb40.i, %entry
 	]
 }
 
-declare arm_apcscc void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind
+declare void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind