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| author | Chris Lattner <sabre@nondot.org> | 2009-05-08 18:23:14 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-05-08 18:23:14 +0000 |
| commit | 49921963220485efb9610a45cb21952dd0cdb67f (patch) | |
| tree | 332aa99786f8c6b1307eadf0aa0f9eb9baa53f89 /test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll | |
| parent | 2a6e0a2140f3fc3597fdefa8c4179a230b29b267 (diff) | |
| download | llvm-49921963220485efb9610a45cb21952dd0cdb67f.tar.gz llvm-49921963220485efb9610a45cb21952dd0cdb67f.tar.bz2 llvm-49921963220485efb9610a45cb21952dd0cdb67f.tar.xz | |
Fix PR4152: asm constraint validation happens before dag combine, so we
need to work a bit to combine things like (x+c1+c2) into x+c3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71232 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll')
| -rw-r--r-- | test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll new file mode 100644 index 0000000000..284c6e250d --- /dev/null +++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll @@ -0,0 +1,17 @@ +; RUN: llvm-as < %s | llc -relocation-model=static > %t +; RUN: grep "1: ._pv_cpu_ops+8" %t +; RUN: grep "2: ._G" %t +; PR4152 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin9.6" + %struct.pv_cpu_ops = type { i32, [2 x i32] } +@pv_cpu_ops = external global %struct.pv_cpu_ops ; <%struct.pv_cpu_ops*> [#uses=1] +@G = external global i32 ; <i32*> [#uses=1] + +define void @x() nounwind { +entry: + tail call void asm sideeffect "1: $0", "i,~{dirflag},~{fpsr},~{flags}"(i32* getelementptr (%struct.pv_cpu_ops* @pv_cpu_ops, i32 0, i32 1, i32 1)) nounwind + tail call void asm sideeffect "2: $0", "i,~{dirflag},~{fpsr},~{flags}"(i32* @G) nounwind + ret void +} |