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authorEli Friedman <eli.friedman@gmail.com>2009-06-06 06:05:10 +0000
committerEli Friedman <eli.friedman@gmail.com>2009-06-06 06:05:10 +0000
commit1041553424cb0a9af03398ee0bff0d1a23fccc6f (patch)
tree1c4be2704e733e7a4d4c08a10e1e39daa9930c65 /test/CodeGen/X86/2009-06-05-VZextByteShort.ll
parent9d47b8d8ea5f7cc714fb56acc4711ba25324b454 (diff)
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Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL
nodes for vectors with an i16 element type. Add an optimization for building a vector which is all zeros/undef except for the bottom element, where the bottom element is an i8 or i16. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72988 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2009-06-05-VZextByteShort.ll')
-rw-r--r--test/CodeGen/X86/2009-06-05-VZextByteShort.ll37
1 files changed, 37 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2009-06-05-VZextByteShort.ll b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
new file mode 100644
index 0000000000..220423aa98
--- /dev/null
+++ b/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
@@ -0,0 +1,37 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2 > %t1
+; RUN: grep movzwl %t1 | count 2
+; RUN: grep movzbl %t1 | count 2
+; RUN: grep movd %t1 | count 4
+
+define <4 x i16> @a(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i16
+ %r = insertelement <4 x i16> zeroinitializer, i16 %x, i32 0
+ ret <4 x i16> %r
+}
+
+define <8 x i16> @b(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i16
+ %r = insertelement <8 x i16> zeroinitializer, i16 %x, i32 0
+ ret <8 x i16> %r
+}
+
+define <8 x i8> @c(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i8
+ %r = insertelement <8 x i8> zeroinitializer, i8 %x, i32 0
+ ret <8 x i8> %r
+}
+
+define <16 x i8> @d(i32* %x1) nounwind {
+ %x2 = load i32* %x1
+ %x3 = lshr i32 %x2, 1
+ %x = trunc i32 %x3 to i8
+ %r = insertelement <16 x i8> zeroinitializer, i8 %x, i32 0
+ ret <16 x i8> %r
+}
+