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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-10-11 14:36:35 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-10-11 14:36:35 +0000 |
| commit | 6fe4e515470a9c2ffa1324261674dde0ede32e72 (patch) | |
| tree | 12a7e185f8c26244cdd6b64f446544473e2b1ddc /test/CodeGen/X86/2011-10-11-srl.ll | |
| parent | 6c6f28ffe42d06655f5977bd0d01214e32de93a5 (diff) | |
| download | llvm-6fe4e515470a9c2ffa1324261674dde0ede32e72.tar.gz llvm-6fe4e515470a9c2ffa1324261674dde0ede32e72.tar.bz2 llvm-6fe4e515470a9c2ffa1324261674dde0ede32e72.tar.xz | |
Add support for legalization of vector SHL/SRA/SRL instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141667 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/2011-10-11-srl.ll')
| -rw-r--r-- | test/CodeGen/X86/2011-10-11-srl.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2011-10-11-srl.ll b/test/CodeGen/X86/2011-10-11-srl.ll new file mode 100644 index 0000000000..cf9d36f1c4 --- /dev/null +++ b/test/CodeGen/X86/2011-10-11-srl.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -promote-elements -mattr=-sse41 + +target triple = "x86_64-unknown-linux-gnu" + +define void @m387(<2 x i8>* %p, <2 x i16>* %q) { + %t = load <2 x i8>* %p + %r = sext <2 x i8> %t to <2 x i16> + store <2 x i16> %r, <2 x i16>* %q + ret void +} + |