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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-17 23:44:19 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-17 23:44:19 +0000 |
| commit | ed18a3e6b25817136471a0fd1b09ff4edd936055 (patch) | |
| tree | ef86fc20887152dc208f808ab884c3ab07ca7257 /test/CodeGen/X86/add.ll | |
| parent | 97f87abbf4bc270c794abbbf8e152f38b0731d85 (diff) | |
| download | llvm-ed18a3e6b25817136471a0fd1b09ff4edd936055.tar.gz llvm-ed18a3e6b25817136471a0fd1b09ff4edd936055.tar.bz2 llvm-ed18a3e6b25817136471a0fd1b09ff4edd936055.tar.xz | |
Remove -join-physregs from the test suite.
This option has been disabled for a while, and it is going away so I can
clean up the coalescer code.
The tests that required physreg joining to be enabled were almost all of
the form "tiny function with interference between arguments and return
value". Such functions are usually inlined in the real world.
The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly
rare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/add.ll')
| -rw-r--r-- | test/CodeGen/X86/add.ll | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 8e871f4aeb..03d2e472cb 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -1,8 +1,6 @@ ; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -join-physregs | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 -join-physregs | FileCheck %s -check-prefix=X64 - -; Some of these tests depend on -join-physregs to commute instructions. +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; The immediate can be encoded in a smaller way if the ; instruction is a sub instead of an add. @@ -101,9 +99,9 @@ define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { } ; X64: test7: -; X64: addl %e[[A1]], %eax +; X64: addl %e[[A1]], %e ; X64-NEXT: setb %dl -; X64-NEXT: ret +; X64: ret ; PR5443 define {i64, i1} @test8(i64 %left, i64 %right) nounwind { |