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authorEric Christopher <echristo@apple.com>2011-06-30 00:48:30 +0000
committerEric Christopher <echristo@apple.com>2011-06-30 00:48:30 +0000
commit5d8aa345dd8f92d572a3c639ee7c6f5a7a932384 (patch)
tree455cc28a8ec257902ffd30197f27c506ad5ae99e /test/CodeGen/X86/atomic-or.ll
parent9287a6eef336585628a55e1f33e1e3ea9d7f81cf (diff)
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Fix a small thinko for constant i64 lock/orq optimization where we
we didn't have an opcode for 64-bit constant or expressions. Fixes rdar://9692967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134121 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/atomic-or.ll')
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1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/X86/atomic-or.ll b/test/CodeGen/X86/atomic-or.ll
new file mode 100644
index 0000000000..cd622908ac
--- /dev/null
+++ b/test/CodeGen/X86/atomic-or.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+; rdar://9692967
+
+define void @do_the_sync(i64* %p, i32 %b) nounwind {
+entry:
+ %p.addr = alloca i64*, align 8
+ store i64* %p, i64** %p.addr, align 8
+ %tmp = load i64** %p.addr, align 8
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+; CHECK: lock
+; CHECK-NEXT: orq $2147483648
+ %0 = call i64 @llvm.atomic.load.or.i64.p0i64(i64* %tmp, i64 2147483648)
+ call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+ ret void
+}
+declare i64 @llvm.atomic.load.or.i64.p0i64(i64* nocapture, i64) nounwind
+declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind