diff options
| author | Filipe Cabecinhas <me@filcab.net> | 2014-05-16 22:47:54 +0000 |
|---|---|---|
| committer | Filipe Cabecinhas <me@filcab.net> | 2014-05-16 22:47:54 +0000 |
| commit | d77c1c4465fda5a7ec5432d4e6644c50aa7a74fe (patch) | |
| tree | 7411d39823864a8dc9752a4d36de8969ae17ff5e /test/CodeGen/X86/avx-blend.ll | |
| parent | 5ea7215050818473565584b76bdf53c862754a79 (diff) | |
| download | llvm-d77c1c4465fda5a7ec5432d4e6644c50aa7a74fe.tar.gz llvm-d77c1c4465fda5a7ec5432d4e6644c50aa7a74fe.tar.bz2 llvm-d77c1c4465fda5a7ec5432d4e6644c50aa7a74fe.tar.xz | |
Implemented special cases for PerformVSELECTCombine.
vselects with constant masks, after legalization, will get turned into
specialized shuffle_vectors so they can be matched to blend+imm
instructions.
Fixed some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209044 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/avx-blend.ll')
| -rw-r--r-- | test/CodeGen/X86/avx-blend.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/X86/avx-blend.ll b/test/CodeGen/X86/avx-blend.ll index 4757ce0c9f..8577a616c3 100644 --- a/test/CodeGen/X86/avx-blend.ll +++ b/test/CodeGen/X86/avx-blend.ll @@ -69,7 +69,8 @@ define <8 x i32> @vsel_i328(<8 x i32> %v1, <8 x i32> %v2) { } ;CHECK-LABEL: vsel_double8: -;CHECK: vblendvpd +;CHECK: vblendpd $1 +;CHECK: vblendpd $1 ;CHECK: ret define <8 x double> @vsel_double8(<8 x double> %v1, <8 x double> %v2) { %vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x double> %v1, <8 x double> %v2 @@ -77,7 +78,8 @@ define <8 x double> @vsel_double8(<8 x double> %v1, <8 x double> %v2) { } ;CHECK-LABEL: vsel_i648: -;CHECK: vblendvpd +;CHECK: vblendpd $1 +;CHECK: vblendpd $1 ;CHECK: ret define <8 x i64> @vsel_i648(<8 x i64> %v1, <8 x i64> %v2) { %vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x i64> %v1, <8 x i64> %v2 @@ -86,7 +88,7 @@ define <8 x i64> @vsel_i648(<8 x i64> %v1, <8 x i64> %v2) { ;CHECK-LABEL: vsel_double4: ;CHECK-NOT: vinsertf128 -;CHECK: vblendpd $5 +;CHECK: vshufpd $10 ;CHECK-NEXT: ret define <4 x double> @vsel_double4(<4 x double> %v1, <4 x double> %v2) { %vsel = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x double> %v1, <4 x double> %v2 @@ -111,5 +113,3 @@ define <2 x double> @testb(<2 x double> %x, <2 x double> %y) { %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y ret <2 x double> %min } - - |