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authorElena Demikhovsky <elena.demikhovsky@intel.com>2013-06-26 10:55:03 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2013-06-26 10:55:03 +0000
commit87070fe1073b1e95748d987af0810d02aac43603 (patch)
tree29608b26070b26a78bd0a59f77b096fa30556407 /test/CodeGen/X86/avx-shift.ll
parentd4429214a2dffcfd8f97956ac8b1a67c4795d242 (diff)
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Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184931 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/avx-shift.ll')
-rw-r--r--test/CodeGen/X86/avx-shift.ll3
1 files changed, 2 insertions, 1 deletions
diff --git a/test/CodeGen/X86/avx-shift.ll b/test/CodeGen/X86/avx-shift.ll
index 01eb7361e2..d79dfcc076 100644
--- a/test/CodeGen/X86/avx-shift.ll
+++ b/test/CodeGen/X86/avx-shift.ll
@@ -103,9 +103,10 @@ define <32 x i8> @vshift12(<32 x i8> %a) nounwind readnone {
;;; Support variable shifts
; CHECK: _vshift08
-; CHECK: vextractf128 $1
; CHECK: vpslld $23
+; CHECK: vextractf128 $1
; CHECK: vpslld $23
+; CHECK: ret
define <8 x i32> @vshift08(<8 x i32> %a) nounwind {
%bitop = shl <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, %a
ret <8 x i32> %bitop