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authorNick Lewycky <nicholas@mxc.ca>2011-06-20 18:33:26 +0000
committerNick Lewycky <nicholas@mxc.ca>2011-06-20 18:33:26 +0000
commit1bd15700a0eb3057d3e2d65070c3fc6b99e0d8a2 (patch)
treeeae295cc95f47a32efa843a1c80c92c14e22ffcf /test/CodeGen/X86/bitcast2.ll
parent332d7e871cbff385e6bf7d42565eb7d92cde0ed6 (diff)
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Emit movq for 64-bit register to XMM register moves, but continue to accept
movd when assembling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/bitcast2.ll')
-rw-r--r--test/CodeGen/X86/bitcast2.ll20
1 files changed, 19 insertions, 1 deletions
diff --git a/test/CodeGen/X86/bitcast2.ll b/test/CodeGen/X86/bitcast2.ll
index 48922b5f5a..71ecedf8f1 100644
--- a/test/CodeGen/X86/bitcast2.ll
+++ b/test/CodeGen/X86/bitcast2.ll
@@ -1,13 +1,31 @@
-; RUN: llc < %s -march=x86-64 | grep movd | count 2
+; RUN: llc < %s -march=x86-64 | FileCheck %s
; RUN: llc < %s -march=x86-64 | not grep rsp
define i64 @test1(double %A) {
+; CHECK: test1
+; CHECK: movq
%B = bitcast double %A to i64
ret i64 %B
}
define double @test2(i64 %A) {
+; CHECK: test2
+; CHECK: movq
%B = bitcast i64 %A to double
ret double %B
}
+define i32 @test3(float %A) {
+; CHECK: test3
+; CHECK: movd
+ %B = bitcast float %A to i32
+ ret i32 %B
+}
+
+define float @test4(i32 %A) {
+; CHECK: test4
+; CHECK: movd
+ %B = bitcast i32 %A to float
+ ret float %B
+}
+