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authorBob Wilson <bob.wilson@apple.com>2009-10-28 22:10:20 +0000
committerBob Wilson <bob.wilson@apple.com>2009-10-28 22:10:20 +0000
commit2c04dae715b05017d7d2c19ab4f8cb37c1e650ae (patch)
tree7302c827c3bf5c86d4afc419d97268738dc4d2e2 /test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
parente841d2f8679f603ec453fe56a3bf9bea97aef303 (diff)
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Reimplement BranchFolding change to avoid tail merging for a 1 instruction
common tail, except when the OptimizeForSize function attribute is present. Radar 7338114. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85441 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll')
-rw-r--r--test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
index 2b4b83259b..337f1b2a8e 100644
--- a/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
+++ b/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
@@ -2,7 +2,7 @@
; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
; RUN: grep {leal 1(\%rsi),} %t
-define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind {
+define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind optsize {
entry:
%0 = add i32 %i2, 1 ; <i32> [#uses=1]
%1 = sext i32 %0 to i64 ; <i64> [#uses=1]