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author | Alexey Samsonov <samsonov@google.com> | 2012-07-16 06:54:09 +0000 |
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committer | Alexey Samsonov <samsonov@google.com> | 2012-07-16 06:54:09 +0000 |
commit | 99a92f269d4ea6f13a9858bb883e13382d021120 (patch) | |
tree | b158cfaac30e00e48d05b2fa0151950bd0df773b /test/CodeGen/X86/force-align-stack-alloca.ll | |
parent | 38f488e46292e38c776dd6ec3e3a0b8c57952fcb (diff) | |
download | llvm-99a92f269d4ea6f13a9858bb883e13382d021120.tar.gz llvm-99a92f269d4ea6f13a9858bb883e13382d021120.tar.bz2 llvm-99a92f269d4ea6f13a9858bb883e13382d021120.tar.xz |
This CL changes the function prologue and epilogue emitted on X86 when stack needs realignment.
It is intended to fix PR11468.
Old prologue and epilogue looked like this:
push %rbp
mov %rsp, %rbp
and $alignment, %rsp
push %r14
push %r15
...
pop %r15
pop %r14
mov %rbp, %rsp
pop %rbp
The problem was to reference the locations of callee-saved registers in exception handling:
locations of callee-saved had to be re-calculated regarding the stack alignment operation. It would
take some effort to implement this in LLVM, as currently MachineLocation can only have the form
"Register + Offset". Funciton prologue and epilogue are now changed to:
push %rbp
mov %rsp, %rbp
push %14
push %15
and $alignment, %rsp
...
lea -$size_of_saved_registers(%rbp), %rsp
pop %r15
pop %r14
pop %rbp
Reviewed by Chad Rosier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160248 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/force-align-stack-alloca.ll')
-rw-r--r-- | test/CodeGen/X86/force-align-stack-alloca.ll | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll index ecef781f88..6d44559437 100644 --- a/test/CodeGen/X86/force-align-stack-alloca.ll +++ b/test/CodeGen/X86/force-align-stack-alloca.ll @@ -19,10 +19,10 @@ define i64 @g(i32 %i) nounwind { ; CHECK: g: ; CHECK: pushl %ebp ; CHECK-NEXT: movl %esp, %ebp -; CHECK-NEXT: andl $-32, %esp ; CHECK-NEXT: pushl ; CHECK-NEXT: pushl -; CHECK-NEXT: subl $24, %esp +; CHECK-NEXT: andl $-32, %esp +; CHECK-NEXT: subl $32, %esp ; ; Now setup the base pointer (%ebx). ; CHECK-NEXT: movl %esp, %ebx @@ -46,17 +46,13 @@ define i64 @g(i32 %i) nounwind { ; CHECK-NEXT: addl $32, %esp ; CHECK-NOT: {{[^ ,]*}}, %esp ; -; Restore %esp from %ebx (base pointer) so we can pop the callee-saved -; registers. This is the state prior to the allocation of VLAs. +; Restore %esp from %ebp (frame pointer) and subtract the size of +; zone with callee-saved registers to pop them. +; This is the state prior to stack realignment and the allocation of VLAs. ; CHECK-NOT: popl -; CHECK: movl %ebx, %esp -; CHECK-NEXT: addl $24, %esp +; CHECK: leal -8(%ebp), %esp ; CHECK-NEXT: popl ; CHECK-NEXT: popl -; -; Finally we need to restore %esp from %ebp due to dynamic stack -; realignment. -; CHECK-NEXT: movl %ebp, %esp ; CHECK-NEXT: popl %ebp ; CHECK-NEXT: ret |