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author | Evan Cheng <evan.cheng@apple.com> | 2009-10-30 20:03:40 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-10-30 20:03:40 +0000 |
commit | 3efabd316f05c8c9f82a62424721532c474fc067 (patch) | |
tree | 9aace192648093a786d5b1bd78c6c01081fa3237 /test/CodeGen/X86/palignr-2.ll | |
parent | 1f22d6f131170f4dca02296fe266323d6339e6a3 (diff) | |
download | llvm-3efabd316f05c8c9f82a62424721532c474fc067.tar.gz llvm-3efabd316f05c8c9f82a62424721532c474fc067.tar.bz2 llvm-3efabd316f05c8c9f82a62424721532c474fc067.tar.xz |
I forgot to commit this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85608 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/palignr-2.ll')
-rw-r--r-- | test/CodeGen/X86/palignr-2.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/test/CodeGen/X86/palignr-2.ll b/test/CodeGen/X86/palignr-2.ll new file mode 100644 index 0000000000..2db6926c3a --- /dev/null +++ b/test/CodeGen/X86/palignr-2.ll @@ -0,0 +1,28 @@ +; RUN: llc < %s -march=x86 -mattr=+sse3 | FileCheck %s +; rdar://7341330 + +@a = global [4 x i32] [i32 4, i32 5, i32 6, i32 7], align 16 ; <[4 x i32]*> [#uses=1] +@c = common global [4 x i32] zeroinitializer, align 16 ; <[4 x i32]*> [#uses=1] +@b = global [4 x i32] [i32 0, i32 1, i32 2, i32 3], align 16 ; <[4 x i32]*> [#uses=1] + +define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp { +entry: +; CHECK: t1: +; palignr $3, %xmm1, %xmm0 + %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i32 24) nounwind readnone + store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 + ret void +} + +declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i32) nounwind readnone + +define void @t2() nounwind ssp { +entry: +; CHECK: t2: +; palignr $4, _b, %xmm0 + %0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] + %1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1] + %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i32 32) nounwind readnone + store <2 x i64> %2, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16 + ret void +} |