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| author | Preston Gurd <preston.gurd@intel.com> | 2013-01-04 20:54:54 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2013-01-04 20:54:54 +0000 |
| commit | dd30b471750aca5c652873f9a8972df162b7e5eb (patch) | |
| tree | 9d8456fada6e2541f3a24cfe271493a526bd3a36 /test/CodeGen/X86/ret-mmx.ll | |
| parent | 60507d53e7e8e6b0c537675f68204a93c3033de7 (diff) | |
| download | llvm-dd30b471750aca5c652873f9a8972df162b7e5eb.tar.gz llvm-dd30b471750aca5c652873f9a8972df162b7e5eb.tar.bz2 llvm-dd30b471750aca5c652873f9a8972df162b7e5eb.tar.xz | |
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.
When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.
It includes tests.
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171524 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/ret-mmx.ll')
| -rw-r--r-- | test/CodeGen/X86/ret-mmx.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/ret-mmx.ll b/test/CodeGen/X86/ret-mmx.ll index 865e147a4a..778e4722cd 100644 --- a/test/CodeGen/X86/ret-mmx.ll +++ b/test/CodeGen/X86/ret-mmx.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -mattr=+mmx,+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -mcpu=core2 -mattr=+mmx,+sse2 | FileCheck %s ; rdar://6602459 @g_v1di = external global <1 x i64> |