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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-20 06:38:32 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-20 06:38:32 +0000
commit8e86929e3ce3fe56295d2704b93bf14c709b311a (patch)
tree724d2f52b31243fda72dd8ab5f10ba9b9297dd99 /test/CodeGen/X86/shift-folding.ll
parent4991de8fe1e72230cf714378b96411f1b59f6b77 (diff)
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Properly constrain register classes in 2-addr.
X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157149 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/shift-folding.ll')
-rw-r--r--test/CodeGen/X86/shift-folding.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/shift-folding.ll b/test/CodeGen/X86/shift-folding.ll
index 3ea601147b..c518cdd3aa 100644
--- a/test/CodeGen/X86/shift-folding.ll
+++ b/test/CodeGen/X86/shift-folding.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 -verify-coalescing | FileCheck %s
define i32* @test1(i32* %P, i32 %X) {
; CHECK: test1: