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| author | Chris Lattner <sabre@nondot.org> | 2009-08-15 17:05:03 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-08-15 17:05:03 +0000 |
| commit | 075ee999d34a6824880a2524123979c344d9bc6e (patch) | |
| tree | 87633bfd419bf7cf29735d78fa62f6ce6f1e4a8d /test/CodeGen/X86/sse3.ll | |
| parent | bd0463098ba8f2fbf49a671500e55c525f66cade (diff) | |
| download | llvm-075ee999d34a6824880a2524123979c344d9bc6e.tar.gz llvm-075ee999d34a6824880a2524123979c344d9bc6e.tar.bz2 llvm-075ee999d34a6824880a2524123979c344d9bc6e.tar.xz | |
convert test to filecheck format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79114 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/sse3.ll')
| -rw-r--r-- | test/CodeGen/X86/sse3.ll | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index a498ac527c..5e7908cd8d 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -1,14 +1,24 @@ -; RUN: llvm-as < %s | llc -march=x86 -mcpu=yonah -o %t -f -; RUN: not grep pextrw %t -; RUN: grep pinsrw %t +; These are tests for SSE3 codegen. Yonah has SSE3 and earlier but not SSSE3+. + +; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=yonah | FileCheck %s --check-prefix=X64 ; Test for v8xi16 lowering where we extract the first element of the vector and ; placed it in the second element of the result. -define void @test_cl(<8 x i16> addrspace(1)* %dest, <8 x i16> addrspace(1)* %old) nounwind { +define void @shuf1(<8 x i16>* %dest, <8 x i16>* %old) nounwind { entry: - %tmp3 = load <8 x i16> addrspace(1)* %old ; <<8 x i16>> [#uses=1] - %tmp6 = shufflevector <8 x i16> %tmp3, <8 x i16> < i16 0, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >, <8 x i32> < i32 8, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > ; <<8 x i16>> [#uses=1] - store <8 x i16> %tmp6, <8 x i16> addrspace(1)* %dest + %tmp3 = load <8 x i16>* %old + %tmp6 = shufflevector <8 x i16> %tmp3, + <8 x i16> < i16 0, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef >, + <8 x i32> < i32 8, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef > + store <8 x i16> %tmp6, <8 x i16>* %dest ret void + +; X64: shuf1: +; X64: movddup (%rsi), %xmm0 +; X64: pshuflw $0, %xmm0, %xmm0 +; X64: xorl %eax, %eax +; X64: pinsrw $0, %eax, %xmm0 +; X64: movaps %xmm0, (%rdi) +; X64: ret }
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