diff options
author | Dan Gohman <gohman@apple.com> | 2010-01-09 02:13:55 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2010-01-09 02:13:55 +0000 |
commit | d1996360399ad6dbe75ee185b661b16c83146373 (patch) | |
tree | 02b89e058115af07ac54af470d7adbc3b30aea52 /test/CodeGen/X86/vec_cast.ll | |
parent | 70644e92d810f36710bc289cda11e982b399fc88 (diff) | |
download | llvm-d1996360399ad6dbe75ee185b661b16c83146373.tar.gz llvm-d1996360399ad6dbe75ee185b661b16c83146373.tar.bz2 llvm-d1996360399ad6dbe75ee185b661b16c83146373.tar.xz |
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_cast.ll')
-rw-r--r-- | test/CodeGen/X86/vec_cast.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_cast.ll b/test/CodeGen/X86/vec_cast.ll new file mode 100644 index 0000000000..1f899b3c20 --- /dev/null +++ b/test/CodeGen/X86/vec_cast.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -march=x86-64 -disable-mmx + +define <8 x i32> @a(<8 x i16> %a) nounwind { + %c = sext <8 x i16> %a to <8 x i32> + ret <8 x i32> %c +} + +define <3 x i32> @b(<3 x i16> %a) nounwind { + %c = sext <3 x i16> %a to <3 x i32> + ret <3 x i32> %c +} + +define <1 x i32> @c(<1 x i16> %a) nounwind { + %c = sext <1 x i16> %a to <1 x i32> + ret <1 x i32> %c +} + +define <8 x i32> @d(<8 x i16> %a) nounwind { + %c = zext <8 x i16> %a to <8 x i32> + ret <8 x i32> %c +} + +define <3 x i32> @e(<3 x i16> %a) nounwind { + %c = zext <3 x i16> %a to <3 x i32> + ret <3 x i32> %c +} + +define <1 x i32> @f(<1 x i16> %a) nounwind { + %c = zext <1 x i16> %a to <1 x i32> + ret <1 x i32> %c +} + +; TODO: Legalize doesn't yet handle this. +;define <8 x i16> @g(<8 x i32> %a) nounwind { +; %c = trunc <8 x i32> %a to <8 x i16> +; ret <8 x i16> %c +;} + +define <3 x i16> @h(<3 x i32> %a) nounwind { + %c = trunc <3 x i32> %a to <3 x i16> + ret <3 x i16> %c +} + +define <1 x i16> @i(<1 x i32> %a) nounwind { + %c = trunc <1 x i32> %a to <1 x i16> + ret <1 x i16> %c +} |