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| author | Tim Northover <tnorthover@apple.com> | 2013-10-10 09:28:20 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-10-10 09:28:20 +0000 |
| commit | acd79ce0ada50c7a437757d188f410d67030fbb9 (patch) | |
| tree | 274ea0cd930191f2399f1b707ffcc95c26bf7343 /test/CodeGen/X86/vec_set-9.ll | |
| parent | 15de63cfdedc9a449217c841f8e084387b2159c8 (diff) | |
| download | llvm-acd79ce0ada50c7a437757d188f410d67030fbb9.tar.gz llvm-acd79ce0ada50c7a437757d188f410d67030fbb9.tar.bz2 llvm-acd79ce0ada50c7a437757d188f410d67030fbb9.tar.xz | |
ARM: correct liveness flags during ARMLoadStoreOpt
When we had a sequence like:
s1 = VLDRS [r0, 1], Q0<imp-def>
s3 = VLDRS [r0, 2], Q0<imp-use,kill>, Q0<imp-def>
s0 = VLDRS [r0, 0], Q0<imp-use,kill>, Q0<imp-def>
s2 = VLDRS [r0, 4], Q0<imp-use,kill>, Q0<imp-def>
we were gathering the {s0, s1} loads below the s3 load. This is fine,
but confused the verifier since now the s3 load had Q0<imp-use> with
no definition above it.
This should mark such uses <undef> as well. The liveness structure at
the beginning and end of the block is unaffected, and the true sN
definitions should prevent any dodgy reorderings being introduced
elsewhere.
rdar://problem/15124449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192344 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_set-9.ll')
0 files changed, 0 insertions, 0 deletions