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authorPreston Gurd <preston.gurd@intel.com>2012-07-19 18:53:21 +0000
committerPreston Gurd <preston.gurd@intel.com>2012-07-19 18:53:21 +0000
commit5b50701b1cebe3b3589f22f76bff2d9fc1601581 (patch)
tree73d014f5c0d575081dd8b522e3a6c6a3452c1b45 /test/CodeGen/X86
parente88ed0934637a21f02ef5dc8b01075c0f8870d11 (diff)
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Fix remaining lit tests which were failing when run on an Atom
processor. Patches by Tyler Nowicki, Andy Zhang, and Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160520 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll2
-rw-r--r--test/CodeGen/X86/2011-06-03-x87chain.ll2
-rw-r--r--test/CodeGen/X86/dbg-merge-loc-entry.ll2
-rw-r--r--test/CodeGen/X86/dynamic-allocas-VLAs.ll4
-rw-r--r--test/CodeGen/X86/fast-isel-mem.ll14
-rw-r--r--test/CodeGen/X86/force-align-stack-alloca.ll2
-rw-r--r--test/CodeGen/X86/liveness-local-regalloc.ll2
-rw-r--r--test/CodeGen/X86/lsr-loop-exit-cond.ll17
-rw-r--r--test/CodeGen/X86/lsr-static-addr.ll12
-rw-r--r--test/CodeGen/X86/rdrand.ll2
-rw-r--r--test/CodeGen/X86/thiscall-struct-return.ll4
-rw-r--r--test/CodeGen/X86/tls-pie.ll4
12 files changed, 51 insertions, 16 deletions
diff --git a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
index 9f5a8c53be..5cb05e8a79 100644
--- a/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
+++ b/test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -asm-verbose=false \
-; RUN: -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=basic < %s | \
+; RUN: -mcpu=generic -disable-fp-elim -mattr=-sse41,-sse3,+sse2 -post-RA-scheduler=false -regalloc=basic < %s | \
; RUN: FileCheck %s
; rdar://6808032
diff --git a/test/CodeGen/X86/2011-06-03-x87chain.ll b/test/CodeGen/X86/2011-06-03-x87chain.ll
index bf7f583aab..ce63c74fbd 100644
--- a/test/CodeGen/X86/2011-06-03-x87chain.ll
+++ b/test/CodeGen/X86/2011-06-03-x87chain.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
+; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse | FileCheck %s
define float @chainfail1(i64* nocapture %a, i64* nocapture %b, i32 %x, i32 %y, float* nocapture %f) nounwind uwtable noinline ssp {
entry:
diff --git a/test/CodeGen/X86/dbg-merge-loc-entry.ll b/test/CodeGen/X86/dbg-merge-loc-entry.ll
index c35935f015..d1e349f79d 100644
--- a/test/CodeGen/X86/dbg-merge-loc-entry.ll
+++ b/test/CodeGen/X86/dbg-merge-loc-entry.ll
@@ -10,7 +10,7 @@ target triple = "x86_64-apple-darwin8"
;CHECK-NEXT: .short Lset
;CHECK-NEXT: Ltmp
;CHECK-NEXT: .byte 85 ## DW_OP_reg5
-;CHECK-NEXT: Ltmp5
+;CHECK-NEXT: Ltmp
;CHECK-NEXT: .quad 0
;CHECK-NEXT: .quad 0
diff --git a/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/test/CodeGen/X86/dynamic-allocas-VLAs.ll
index 54ae39b711..c5e47facf3 100644
--- a/test/CodeGen/X86/dynamic-allocas-VLAs.ll
+++ b/test/CodeGen/X86/dynamic-allocas-VLAs.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -force-align-stack -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN
+; RUN: llc < %s -mcpu=generic -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -force-align-stack -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN
; rdar://11496434
; no VLAs or dynamic alignment
diff --git a/test/CodeGen/X86/fast-isel-mem.ll b/test/CodeGen/X86/fast-isel-mem.ll
index 8db1936bc2..52b1e85643 100644
--- a/test/CodeGen/X86/fast-isel-mem.ll
+++ b/test/CodeGen/X86/fast-isel-mem.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=generic | FileCheck %s
+; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=atom | FileCheck -check-prefix=ATOM %s
@src = external global i32
@@ -18,6 +19,13 @@ entry:
; CHECK: movl %eax, (%ecx)
; CHECK: ret
+; ATOM: loadgv:
+; ATOM: movl L_src$non_lazy_ptr, %ecx
+; ATOM: movl (%ecx), %eax
+; ATOM: addl (%ecx), %eax
+; ATOM: movl %eax, (%ecx)
+; ATOM: ret
+
}
%stuff = type { i32 (...)** }
@@ -31,4 +39,8 @@ entry:
; CHECK: movl $0, %eax
; CHECK: movl L_LotsStuff$non_lazy_ptr, %ecx
+; ATOM: _t:
+; ATOM: movl L_LotsStuff$non_lazy_ptr, %ecx
+; ATOM: movl $0, %eax
+
}
diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll
index 6d44559437..4ab906797a 100644
--- a/test/CodeGen/X86/force-align-stack-alloca.ll
+++ b/test/CodeGen/X86/force-align-stack-alloca.ll
@@ -3,7 +3,7 @@
; arbitrarily force alignment up to 32-bytes for i386 hoping that this will
; exceed any ABI provisions.
;
-; RUN: llc < %s -force-align-stack -stack-alignment=32 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -force-align-stack -stack-alignment=32 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/test/CodeGen/X86/liveness-local-regalloc.ll b/test/CodeGen/X86/liveness-local-regalloc.ll
index 721f545985..faeeaa7e9c 100644
--- a/test/CodeGen/X86/liveness-local-regalloc.ll
+++ b/test/CodeGen/X86/liveness-local-regalloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -mcpu=generic -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
; <rdar://problem/7755473>
; PR12821
diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll
index ebda9f201d..6e8d0bfdfe 100644
--- a/test/CodeGen/X86/lsr-loop-exit-cond.ll
+++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll
@@ -1,10 +1,16 @@
-; RUN: llc -mtriple=x86_64-darwin < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-darwin -mcpu=generic < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64-darwin -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
; CHECK: t:
; CHECK: decq
-; CHECK-NEXT: movl (
+; CHECK-NEXT: movl (%r11,%rax,4), %eax
; CHECK-NEXT: jne
+; ATOM: t:
+; ATOM: movl (%r10,%rax,4), %eax
+; ATOM-NEXT: decq
+; ATOM-NEXT: jne
+
@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
@Te3 = external global [256 x i32] ; <[256 x i32]*> [#uses=2]
@@ -149,6 +155,13 @@ bb2: ; preds = %bb
; CHECK: jne
; CHECK: ret
+; ATOM: f:
+; ATOM: %for.body
+; ATOM: incl [[IV:%e..]]
+; ATOM: cmpl $1, [[IV]]
+; ATOM: jne
+; ATOM: ret
+
define i32 @f(i32 %i, i32* nocapture %a) nounwind uwtable readonly ssp {
entry:
%cmp4 = icmp eq i32 %i, 1
diff --git a/test/CodeGen/X86/lsr-static-addr.ll b/test/CodeGen/X86/lsr-static-addr.ll
index c9ed3e553a..6566f56378 100644
--- a/test/CodeGen/X86/lsr-static-addr.ll
+++ b/test/CodeGen/X86/lsr-static-addr.ll
@@ -1,4 +1,5 @@
-; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -march=x86-64 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -march=x86-64 -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s
; CHECK: xorl %eax, %eax
; CHECK: movsd .LCPI0_0(%rip), %xmm0
@@ -9,6 +10,15 @@
; CHECK-NEXT: movsd
; CHECK-NEXT: incq %rax
+; ATOM: movsd .LCPI0_0(%rip), %xmm0
+; ATOM: xorl %eax, %eax
+; ATOM: align
+; ATOM-NEXT: BB0_2:
+; ATOM-NEXT: movsd A(,%rax,8)
+; ATOM-NEXT: mulsd
+; ATOM-NEXT: movsd
+; ATOM-NEXT: incq %rax
+
@A = external global [0 x double]
define void @foo(i64 %n) nounwind {
diff --git a/test/CodeGen/X86/rdrand.ll b/test/CodeGen/X86/rdrand.ll
index 27d1fe6b27..e2224a6196 100644
--- a/test/CodeGen/X86/rdrand.ll
+++ b/test/CodeGen/X86/rdrand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+rdrand | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mcpu=core-avx-i -mattr=+rdrand | FileCheck %s
declare {i16, i32} @llvm.x86.rdrand.16()
declare {i32, i32} @llvm.x86.rdrand.32()
declare {i64, i32} @llvm.x86.rdrand.64()
diff --git a/test/CodeGen/X86/thiscall-struct-return.ll b/test/CodeGen/X86/thiscall-struct-return.ll
index a7be48355f..0507cb890c 100644
--- a/test/CodeGen/X86/thiscall-struct-return.ll
+++ b/test/CodeGen/X86/thiscall-struct-return.ll
@@ -10,7 +10,7 @@ declare x86_thiscallcc void @_ZNK1C6MediumEv(%struct.M* noalias sret %agg.result
define void @testv() nounwind {
; CHECK: testv:
-; CHECK: leal
+; CHECK: leal 16(%esp), %esi
; CHECK-NEXT: movl %esi, (%esp)
; CHECK-NEXT: calll _ZN1CC1Ev
; CHECK: leal 8(%esp), %eax
@@ -29,7 +29,7 @@ entry:
define void @test2v() nounwind {
; CHECK: test2v:
-; CHECK: leal
+; CHECK: leal 16(%esp), %esi
; CHECK-NEXT: movl %esi, (%esp)
; CHECK-NEXT: calll _ZN1CC1Ev
; CHECK: leal 8(%esp), %eax
diff --git a/test/CodeGen/X86/tls-pie.ll b/test/CodeGen/X86/tls-pie.ll
index 8269c43b9a..3fca9f5a37 100644
--- a/test/CodeGen/X86/tls-pie.ll
+++ b/test/CodeGen/X86/tls-pie.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic -enable-pie \
+; RUN: llc < %s -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -enable-pie \
; RUN: | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic -enable-pie \
+; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -enable-pie \
; RUN: | FileCheck -check-prefix=X64 %s
@i = thread_local global i32 15