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author | Dan Gohman <gohman@apple.com> | 2010-08-05 17:04:15 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2010-08-05 17:04:15 +0000 |
commit | a34c885d51b1ad257ff9432f4c3dbac0ecea02d6 (patch) | |
tree | 61fc71565542a8c4e4d18dfcb73c3096581b378d /test/CodeGen/X86 | |
parent | b8be03b0e4275eca68f998baab47e66b8a091c05 (diff) | |
download | llvm-a34c885d51b1ad257ff9432f4c3dbac0ecea02d6.tar.gz llvm-a34c885d51b1ad257ff9432f4c3dbac0ecea02d6.tar.bz2 llvm-a34c885d51b1ad257ff9432f4c3dbac0ecea02d6.tar.xz |
Move x86-specific tests out of test/Transforms/LoopStrengthReduce and
into test/CodeGen/X86, so that they aren't run when the x86 target is
not enabled.
Fix uglygep.ll to not be x86-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110343 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r-- | test/CodeGen/X86/2008-08-06-CmpStride.ll | 23 | ||||
-rw-r--r-- | test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll | 33 | ||||
-rw-r--r-- | test/CodeGen/X86/change-compare-stride-trickiness-0.ll | 29 | ||||
-rw-r--r-- | test/CodeGen/X86/change-compare-stride-trickiness-1.ll | 28 | ||||
-rw-r--r-- | test/CodeGen/X86/change-compare-stride-trickiness-2.ll | 58 | ||||
-rw-r--r-- | test/CodeGen/X86/insert-positions.ll | 69 |
6 files changed, 240 insertions, 0 deletions
diff --git a/test/CodeGen/X86/2008-08-06-CmpStride.ll b/test/CodeGen/X86/2008-08-06-CmpStride.ll new file mode 100644 index 0000000000..99cb8569b3 --- /dev/null +++ b/test/CodeGen/X86/2008-08-06-CmpStride.ll @@ -0,0 +1,23 @@ +; RUN: llc -march=x86-64 < %s -o - | grep {cmpl \\$\[1\], %} + +@.str = internal constant [4 x i8] c"%d\0A\00" + +declare i32 @printf(i8* noalias , ...) nounwind + +define i32 @main() nounwind { +entry: + br label %forbody + +forbody: + %i.0 = phi i32 [ 0, %entry ], [ %inc, %forbody ] ; <i32>[#uses=3] + %sub14 = sub i32 1027, %i.0 ; <i32> [#uses=1] + %mul15 = mul i32 %sub14, 10 ; <i32> [#uses=1] + %add166 = or i32 %mul15, 1 ; <i32> [#uses=1] * + call i32 (i8*, ...)* @printf( i8* noalias getelementptr ([4 x i8]* @.str, i32 0, i32 0), i32 %add166 ) nounwind + %inc = add i32 %i.0, 1 ; <i32> [#uses=3] + %cmp = icmp ne i32 %inc, 1027 ; <i1> [#uses=1] + br i1 %cmp, label %forbody, label %afterfor + +afterfor: ; preds = %forcond + ret i32 0 +} diff --git a/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll b/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll new file mode 100644 index 0000000000..36cc535451 --- /dev/null +++ b/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s +; This used to crash. +; ModuleID = 'bugpoint-reduced-simplified.bc' +target datalayout ="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-unknown-linux-gnu" + +define void @parse_number(i8* nocapture %p) nounwind { +entry: + %shift.0 = select i1 false, i32 4, i32 2 ; <i32> [#uses=1] + br label %bb47 + +bb47: ; preds = %bb47, %entry + br i1 false, label %bb54, label %bb47 + +bb54: ; preds = %bb47 + br i1 false, label %bb56, label %bb66 + +bb56: ; preds = %bb62, %bb54 + %p_addr.0.pn.rec = phi i64 [ %p_addr.6.rec, %bb62 ], [ 0, %bb54 ] ; <i64> [#uses=2] + %ch.6.in.in = phi i8* [ %p_addr.6, %bb62 ], [ null, %bb54 ] ; <i8*> [#uses=0] + %indvar202 = trunc i64 %p_addr.0.pn.rec to i32 ; <i32>[#uses=1] + %frac_bits.0 = mul i32 %indvar202, %shift.0 ; <i32>[#uses=1] + %p_addr.6.rec = add i64 %p_addr.0.pn.rec, 1 ; <i64>[#uses=2] + %p_addr.6 = getelementptr i8* null, i64 %p_addr.6.rec ; <i8*>[#uses=1] + br i1 false, label %bb66, label %bb62 + +bb62: ; preds = %bb56 + br label %bb56 + +bb66: ; preds = %bb56, %bb54 + %frac_bits.1 = phi i32 [ 0, %bb54 ], [ %frac_bits.0, %bb56 ] ; <i32> [#uses=0] + unreachable +} diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-0.ll b/test/CodeGen/X86/change-compare-stride-trickiness-0.ll new file mode 100644 index 0000000000..1f7f6ecafa --- /dev/null +++ b/test/CodeGen/X86/change-compare-stride-trickiness-0.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -o - | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin9" + +; The comparison happens before the relevant use, but it can still be rewritten +; to compare with zero. + +; CHECK: foo: +; CHECK: align +; CHECK: incl %eax +; CHECK-NEXT: decl %ecx +; CHECK-NEXT: jne + +define void @foo() nounwind { +entry: + br label %loop + +loop: + %indvar = phi i32 [ 0, %entry ], [ %i.2.0.us1534, %loop ] ; <i32> [#uses=1] + %i.2.0.us1534 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp611.us1535 = icmp eq i32 %i.2.0.us1534, 4 ; <i1> [#uses=2] + %tmp623.us1538 = select i1 %tmp611.us1535, i32 6, i32 0 ; <i32> [#uses=0] + %tmp628.us1540 = shl i32 %i.2.0.us1534, 1 ; <i32> [#uses=1] + %tmp645646647.us1547 = sext i32 %tmp628.us1540 to i64 ; <i64> [#uses=0] + br i1 %tmp611.us1535, label %exit, label %loop + +exit: + ret void +} diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-1.ll b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll new file mode 100644 index 0000000000..cb638092ea --- /dev/null +++ b/test/CodeGen/X86/change-compare-stride-trickiness-1.ll @@ -0,0 +1,28 @@ +; RUN: llc %s -o - --x86-asm-syntax=att | grep {cmp. \$10} +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +target triple = "x86_64-apple-darwin9" + +; The comparison happens after the relevant use, so the stride can easily +; be changed. The comparison can be done in a narrower mode than the +; induction variable. +; TODO: By making the first store post-increment as well, the loop setup +; could be made simpler. + +define void @foo() nounwind { +entry: + br label %loop + +loop: + %indvar = phi i32 [ 0, %entry ], [ %i.2.0.us1534, %loop ] ; <i32> [#uses=1] + %i.2.0.us1534 = add i32 %indvar, 1 ; <i32> [#uses=3] + %tmp628.us1540 = shl i32 %i.2.0.us1534, 1 ; <i32> [#uses=1] + %tmp645646647.us1547 = sext i32 %tmp628.us1540 to i64 ; <i64> [#uses=1] + store i64 %tmp645646647.us1547, i64* null + %tmp611.us1535 = icmp eq i32 %i.2.0.us1534, 4 ; <i1> [#uses=2] + %tmp623.us1538 = select i1 %tmp611.us1535, i32 6, i32 0 ; <i32> [#uses=1] + store i32 %tmp623.us1538, i32* null + br i1 %tmp611.us1535, label %exit, label %loop + +exit: + ret void +} diff --git a/test/CodeGen/X86/change-compare-stride-trickiness-2.ll b/test/CodeGen/X86/change-compare-stride-trickiness-2.ll new file mode 100644 index 0000000000..ae27383895 --- /dev/null +++ b/test/CodeGen/X86/change-compare-stride-trickiness-2.ll @@ -0,0 +1,58 @@ +; RUN: llc < %s +; PR4222 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "x86_64-pc-linux-gnu" +module asm ".ident\09\22$FreeBSD: head/sys/amd64/amd64/minidump_machdep.c 184499 2008-10-31 10:11:35Z kib $\22" + %struct.dumperinfo = type <{ i32 (i8*, i8*, i64, i64, i64)*, i8*, i32, i32, i64, i64 }> + +define void @minidumpsys(%struct.dumperinfo* %di) nounwind { +entry: + br label %if.end + +if.end: ; preds = %if.end52, %entry + br label %for.cond.i.preheader + +for.cond.i.preheader: ; preds = %if.end52, %if.end + %indvar688 = phi i64 [ 0, %if.end ], [ %indvar.next689, %if.end52 ] ; <i64> [#uses=3] + %tmp690 = shl i64 %indvar688, 12 ; <i64> [#uses=1] + %pa.0642 = add i64 %tmp690, 0 ; <i64> [#uses=1] + %indvar688703 = trunc i64 %indvar688 to i32 ; <i32> [#uses=1] + %tmp692693 = add i32 %indvar688703, 1 ; <i32> [#uses=1] + %phitmp = sext i32 %tmp692693 to i64 ; <i64> [#uses=1] + br i1 false, label %if.end52, label %land.lhs.true.i + +land.lhs.true.i: ; preds = %for.cond.i.preheader + %shr2.i = lshr i64 %pa.0642, 18 ; <i64> [#uses=0] + unreachable + +if.end52: ; preds = %for.cond.i.preheader + %phitmp654 = icmp ult i64 %phitmp, 512 ; <i1> [#uses=1] + %indvar.next689 = add i64 %indvar688, 1 ; <i64> [#uses=1] + br i1 %phitmp654, label %for.cond.i.preheader, label %if.end +} + +define void @promote(%struct.dumperinfo* %di) nounwind { +entry: + br label %if.end + +if.end: ; preds = %if.end52, %entry + br label %for.cond.i.preheader + +for.cond.i.preheader: ; preds = %if.end52, %if.end + %indvar688 = phi i32 [ 0, %if.end ], [ %indvar.next689, %if.end52 ] ; <i64> [#uses=3] + %tmp690 = shl i32 %indvar688, 12 ; <i64> [#uses=1] + %pa.0642 = add i32 %tmp690, 0 ; <i64> [#uses=1] + %tmp692693 = add i32 %indvar688, 1 ; <i32> [#uses=1] + %phitmp = sext i32 %tmp692693 to i64 ; <i64> [#uses=1] + br i1 false, label %if.end52, label %land.lhs.true.i + +land.lhs.true.i: ; preds = %for.cond.i.preheader + %shr2.i = lshr i32 %pa.0642, 18 ; <i64> [#uses=0] + unreachable + +if.end52: ; preds = %for.cond.i.preheader + %phitmp654 = icmp ult i64 %phitmp, 512 ; <i1> [#uses=1] + %indvar.next689 = add i32 %indvar688, 1 ; <i64> [#uses=1] + br i1 %phitmp654, label %for.cond.i.preheader, label %if.end +} diff --git a/test/CodeGen/X86/insert-positions.ll b/test/CodeGen/X86/insert-positions.ll new file mode 100644 index 0000000000..1a695f35e3 --- /dev/null +++ b/test/CodeGen/X86/insert-positions.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 >/dev/null + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" + +define void @test0() nounwind { +if.end90.i.i: + br label %while.body.i.i221.i + +while.body.i.i221.i: ; preds = %while.cond.backedge.i.i.i, %if.end90.i.i + br i1 undef, label %if.then.i.i224.i, label %while.cond.backedge.i.i.i + +while.cond.backedge.i.i.i: ; preds = %for.end.i.i.i, %while.body.i.i221.i + br label %while.body.i.i221.i + +if.then.i.i224.i: ; preds = %while.body.i.i221.i + switch i32 undef, label %for.cond.i.i226.i [ + i32 92, label %sw.bb.i.i225.i + i32 34, label %sw.bb.i.i225.i + i32 110, label %sw.bb21.i.i.i + ] + +sw.bb.i.i225.i: ; preds = %if.then.i.i224.i, %if.then.i.i224.i + unreachable + +sw.bb21.i.i.i: ; preds = %if.then.i.i224.i + unreachable + +for.cond.i.i226.i: ; preds = %for.body.i.i.i, %if.then.i.i224.i + %0 = phi i64 [ %tmp154.i.i.i, %for.body.i.i.i ], [ 0, %if.then.i.i224.i ] ; <i64> [#uses=2] + %tmp154.i.i.i = add i64 %0, 1 ; <i64> [#uses=2] + %i.0.i.i.i = trunc i64 %0 to i32 ; <i32> [#uses=1] + br i1 undef, label %land.rhs.i.i.i, label %for.end.i.i.i + +land.rhs.i.i.i: ; preds = %for.cond.i.i226.i + br i1 undef, label %for.body.i.i.i, label %for.end.i.i.i + +for.body.i.i.i: ; preds = %land.rhs.i.i.i + br label %for.cond.i.i226.i + +for.end.i.i.i: ; preds = %land.rhs.i.i.i, %for.cond.i.i226.i + %idx.ext.i.i.i = sext i32 %i.0.i.i.i to i64 ; <i64> [#uses=1] + %sub.ptr72.sum.i.i.i = xor i64 %idx.ext.i.i.i, -1 ; <i64> [#uses=1] + %pos.addr.1.sum155.i.i.i = add i64 %tmp154.i.i.i, %sub.ptr72.sum.i.i.i ; <i64> [#uses=1] + %arrayidx76.i.i.i = getelementptr inbounds i8* undef, i64 %pos.addr.1.sum155.i.i.i ; <i8*> [#uses=0] + br label %while.cond.backedge.i.i.i +} + +define void @test1() nounwind { +entry: + %t = shl i32 undef, undef ; <i32> [#uses=1] + %t9 = sub nsw i32 0, %t ; <i32> [#uses=1] + br label %outer + +outer: ; preds = %bb18, %bb + %i12 = phi i32 [ %t21, %bb18 ], [ 0, %entry ] ; <i32> [#uses=2] + %i13 = phi i32 [ %t20, %bb18 ], [ 0, %entry ] ; <i32> [#uses=2] + br label %inner + +inner: ; preds = %bb16, %bb11 + %t17 = phi i32 [ %i13, %outer ], [ undef, %inner ] ; <i32> [#uses=1] + store i32 %t17, i32* undef + br i1 undef, label %bb18, label %inner + +bb18: ; preds = %bb16 + %t19 = add i32 %i13, %t9 ; <i32> [#uses=1] + %t20 = add i32 %t19, %i12 ; <i32> [#uses=1] + %t21 = add i32 %i12, 1 ; <i32> [#uses=1] + br label %outer +} |