[FastISel][X86] Only fold the cmp into the select when both instructions are in the same basic block.

If the cmp is in a different basic block, then it is possible that not all
operands of that compare have defined registers. This can happen when one of
the operands to the cmp is a load and the load gets folded into the cmp. In
this case FastISel will skip the load instruction and the vreg is never
defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211730 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 50 insertions, 0 deletions

diff --git a/test/CodeGen/X86/fast-isel-select-cmp.ll b/test/CodeGen/X86/fast-isel-select-cmp.ll
new file mode 100644
index 0000000000..1af30e9f32
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-select-cmp.ll
@@ -0,0 +1,50 @@
+; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s
+
+; Test if we do not fold the cmp into select if the instructions are in
+; different basic blocks.
+
+define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
+; CHECK-LABEL: select_cmp_cmov_i32
+; CHECK-LABEL: continue
+; CHECK-NOT:   cmp
+  %1 = icmp ult i32 %a, %b
+  br i1 %1, label %continue, label %exit
+
+continue:
+  %2 = select i1 %1, i32 %a, i32 %b
+  ret i32 %2
+
+exit:
+  ret i32 -1
+}
+
+define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
+; CHECK-LABEL: select_fcmp_oeq_f32
+; CHECK-LABEL: continue
+; CHECK-NOT:   cmp
+  %1 = fcmp oeq float %a, %b
+  br i1 %1, label %continue, label %exit
+
+continue:
+  %2 = select i1 %1, float %c, float %d
+  ret float %2
+
+exit:
+  ret float -1.0
+}
+
+define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
+; CHECK-LABEL: select_fcmp_one_f32
+; CHECK-LABEL: continue
+; CHECK-NOT:   ucomi
+  %1 = fcmp one float %a, %b
+  br i1 %1, label %continue, label %exit
+
+continue:
+  %2 = select i1 %1, float %c, float %d
+  ret float %2
+
+exit:
+  ret float -1.0
+}
+