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authorCraig Topper <craig.topper@gmail.com>2013-07-17 05:57:45 +0000
committerCraig Topper <craig.topper@gmail.com>2013-07-17 05:57:45 +0000
commite0364b64d12330f6f8c47ef98fc658468e2b72e4 (patch)
tree38abae77d1473fd869eed763ed9557d3edfd6512 /test/CodeGen/X86
parentd055c595443fefe64b33d28d0b2556ace04084ad (diff)
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Make x86 fast-isel correctly choose between aligned and unaligned operations for vector stores. Fixes PR16640.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186491 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll2
-rw-r--r--test/CodeGen/X86/fast-isel-store.ll48
-rw-r--r--test/CodeGen/X86/fast-isel-unaligned-store.ll18
3 files changed, 49 insertions, 19 deletions
diff --git a/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll b/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
index 8c09d97f08..e7d1e194d9 100644
--- a/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
+++ b/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
@@ -20,7 +20,7 @@ entry:
%2 = load <4 x float>* %p3, align 16
%3 = load <4 x float>* %p4, align 16
%4 = load <4 x float>* %p5, align 16
-; CHECK: movaps {{%xmm[0-7]}}, (%esp)
+; CHECK: movups {{%xmm[0-7]}}, (%esp)
; CHECK-NEXT: calll _dovectortest
call void @dovectortest(<4 x float> %0, <4 x float> %1, <4 x float> %2, <4 x float> %3, <4 x float> %4)
ret void
diff --git a/test/CodeGen/X86/fast-isel-store.ll b/test/CodeGen/X86/fast-isel-store.ll
new file mode 100644
index 0000000000..06f5b6621a
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-store.ll
@@ -0,0 +1,48 @@
+; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort -mattr=+sse2 < %s | FileCheck %s
+
+define i32 @test_store_32(i32* nocapture %addr, i32 %value) {
+entry:
+ store i32 %value, i32* %addr, align 1
+ ret i32 %value
+}
+
+; CHECK: ret
+
+define i16 @test_store_16(i16* nocapture %addr, i16 %value) {
+entry:
+ store i16 %value, i16* %addr, align 1
+ ret i16 %value
+}
+
+; CHECK: ret
+
+define <4 x i32> @test_store_4xi32(<4 x i32>* nocapture %addr, <4 x i32> %value, <4 x i32> %value2) {
+; CHECK: movdqu
+; CHECK: ret
+ %foo = add <4 x i32> %value, %value2 ; to force integer type on store
+ store <4 x i32> %foo, <4 x i32>* %addr, align 1
+ ret <4 x i32> %foo
+}
+
+define <4 x i32> @test_store_4xi32_aligned(<4 x i32>* nocapture %addr, <4 x i32> %value, <4 x i32> %value2) {
+; CHECK: movdqa
+; CHECK: ret
+ %foo = add <4 x i32> %value, %value2 ; to force integer type on store
+ store <4 x i32> %foo, <4 x i32>* %addr, align 16
+ ret <4 x i32> %foo
+}
+
+define <4 x float> @test_store_4xf32(<4 x float>* nocapture %addr, <4 x float> %value) {
+; CHECK: movups
+; CHECK: ret
+ store <4 x float> %value, <4 x float>* %addr, align 1
+ ret <4 x float> %value
+}
+
+define <4 x float> @test_store_4xf32_aligned(<4 x float>* nocapture %addr, <4 x float> %value) {
+; CHECK: movaps
+; CHECK: ret
+ store <4 x float> %value, <4 x float>* %addr, align 16
+ ret <4 x float> %value
+}
diff --git a/test/CodeGen/X86/fast-isel-unaligned-store.ll b/test/CodeGen/X86/fast-isel-unaligned-store.ll
deleted file mode 100644
index 7ce7f676ad..0000000000
--- a/test/CodeGen/X86/fast-isel-unaligned-store.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
-
-define i32 @test_store_32(i32* nocapture %addr, i32 %value) {
-entry:
- store i32 %value, i32* %addr, align 1
- ret i32 %value
-}
-
-; CHECK: ret
-
-define i16 @test_store_16(i16* nocapture %addr, i16 %value) {
-entry:
- store i16 %value, i16* %addr, align 1
- ret i16 %value
-}
-
-; CHECK: ret