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authorTanya Lattner <tonic@nondot.org>2008-03-01 07:38:40 +0000
committerTanya Lattner <tonic@nondot.org>2008-03-01 07:38:40 +0000
commit9bc243b2517f4f1aef3319ba01ea6f0788e87cb6 (patch)
treee3b7a85489213ca435df8fdecb7a12601e2f00ac /test/Feature/instructions.ll
parente5101bf52c8c9b96e072c10f1a141ef021971137 (diff)
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Remove llvm-upgrade and update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47784 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Feature/instructions.ll')
-rw-r--r--test/Feature/instructions.ll27
1 files changed, 13 insertions, 14 deletions
diff --git a/test/Feature/instructions.ll b/test/Feature/instructions.ll
index 6867491775..d0c303d719 100644
--- a/test/Feature/instructions.ll
+++ b/test/Feature/instructions.ll
@@ -1,25 +1,24 @@
-; RUN: llvm-upgrade < %s | llvm-as | llvm-dis > %t1.ll
+; RUN: llvm-as < %s | llvm-dis > %t1.ll
; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
; RUN: diff %t1.ll %t2.ll
-uint %test_extractelement(<4 x uint> %V) {
- %R = extractelement <4 x uint> %V, uint 1
- ret uint %R
+define i32 @test_extractelement(<4 x i32> %V) {
+ %R = extractelement <4 x i32> %V, i32 1 ; <i32> [#uses=1]
+ ret i32 %R
}
-<4 x uint> %test_insertelement(<4 x uint> %V) {
- %R = insertelement <4 x uint> %V, uint 0, uint 0
- ret <4 x uint> %R
+define <4 x i32> @test_insertelement(<4 x i32> %V) {
+ %R = insertelement <4 x i32> %V, i32 0, i32 0 ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
}
-<4 x uint> %test_shufflevector_u(<4 x uint> %V) {
- %R = shufflevector <4 x uint> %V, <4 x uint> %V,
- <4 x uint> < uint 1, uint undef, uint 7, uint 2>
- ret <4 x uint> %R
+define <4 x i32> @test_shufflevector_u(<4 x i32> %V) {
+ %R = shufflevector <4 x i32> %V, <4 x i32> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x i32>> [#uses=1]
+ ret <4 x i32> %R
}
-<4 x float> %test_shufflevector_f(<4 x float> %V) {
- %R = shufflevector <4 x float> %V, <4 x float> undef,
- <4 x uint> < uint 1, uint undef, uint 7, uint 2>
+define <4 x float> @test_shufflevector_f(<4 x float> %V) {
+ %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]
ret <4 x float> %R
}
+