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author | Reid Spencer <rspencer@reidspencer.com> | 2007-01-26 08:25:06 +0000 |
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committer | Reid Spencer <rspencer@reidspencer.com> | 2007-01-26 08:25:06 +0000 |
commit | e3ff5ada8a8f6cc166ecc45147da0d63c3683026 (patch) | |
tree | ccd4a6b0d605384b41f7d3b84cc019344c2dd65a /test/Integer/instructions_bt.ll | |
parent | 950bf6030101d670ea205efd307ea5d3b375544d (diff) | |
download | llvm-e3ff5ada8a8f6cc166ecc45147da0d63c3683026.tar.gz llvm-e3ff5ada8a8f6cc166ecc45147da0d63c3683026.tar.bz2 llvm-e3ff5ada8a8f6cc166ecc45147da0d63c3683026.tar.xz |
For PR761:
Remove "target endian/pointersize" or add "target datalayout" to make
the test parse properly or set the datalayout because defaults changes.
For PR645:
Make global names use the @ prefix.
For llvm-upgrade changes:
Fix test cases or completely remove use of llvm-upgrade for test cases
that cannot survive the new renaming or upgrade capabilities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33533 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Integer/instructions_bt.ll')
-rw-r--r-- | test/Integer/instructions_bt.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/Integer/instructions_bt.ll b/test/Integer/instructions_bt.ll index e10fe9e3dd..7ca5890352 100644 --- a/test/Integer/instructions_bt.ll +++ b/test/Integer/instructions_bt.ll @@ -3,23 +3,23 @@ ; RUN: diff %t1.ll %t2.ll -define i39 %test_extractelement(<4 x i39> %V) { +define i39 @test_extractelement(<4 x i39> %V) { %R = extractelement <4 x i39> %V, i32 1 ret i39 %R } -define <4 x i39> %test_insertelement(<4 x i39> %V) { +define <4 x i39> @test_insertelement(<4 x i39> %V) { %R = insertelement <4 x i39> %V, i39 0, i32 0 ret <4 x i39> %R } -define <4 x i39> %test_shufflevector_u(<4 x i39> %V) { +define <4 x i39> @test_shufflevector_u(<4 x i39> %V) { %R = shufflevector <4 x i39> %V, <4 x i39> %V, <4 x i32> < i32 1, i32 undef, i32 7, i32 2> ret <4 x i39> %R } -define <4 x float> %test_shufflevector_f(<4 x float> %V) { +define <4 x float> @test_shufflevector_f(<4 x float> %V) { %R = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> < i32 1, i32 undef, i32 7, i32 2> ret <4 x float> %R |