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| author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-09-13 14:37:52 +0000 |
|---|---|---|
| committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-09-13 14:37:52 +0000 |
| commit | 489b9b348dab51243f93d2f4bdd107c9db077609 (patch) | |
| tree | 68960cdc858730bc99991f70d7c67f226f6efced /test/MC/ARM/invalid-fp-armv8.s | |
| parent | 2a9af9f18eac90b0de739b6ceddf6c2209086303 (diff) | |
| download | llvm-489b9b348dab51243f93d2f4bdd107c9db077609.tar.gz llvm-489b9b348dab51243f93d2f4bdd107c9db077609.tar.bz2 llvm-489b9b348dab51243f93d2f4bdd107c9db077609.tar.xz | |
Fix tests for hasFPARMv8 name change (r190692)
Patch by Bradley Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190694 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/invalid-fp-armv8.s')
| -rw-r--r-- | test/MC/ARM/invalid-fp-armv8.s | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/test/MC/ARM/invalid-fp-armv8.s b/test/MC/ARM/invalid-fp-armv8.s new file mode 100644 index 0000000000..d640dc1dbe --- /dev/null +++ b/test/MC/ARM/invalid-fp-armv8.s @@ -0,0 +1,89 @@ +@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=+fp-armv8 < %s 2>&1 | FileCheck %s --check-prefix=V8 + +@ VCVT{B,T} + + vcvtt.f64.f16 d3, s1 +@ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee] + vcvtt.f16.f64 s5, d12 +@ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee] + + vsel.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselne.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselmi.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselpl.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselvc.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselcs.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselcc.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselhs.f32 s3, s4, s6 +@ V8: error: invalid instruction + vsello.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselhi.f32 s3, s4, s6 +@ V8: error: invalid instruction + vsells.f32 s3, s4, s6 +@ V8: error: invalid instruction + vsellt.f32 s3, s4, s6 +@ V8: error: invalid instruction + vselle.f32 s3, s4, s6 +@ V8: error: invalid instruction + +vseleq.f32 s0, d2, d1 +@ V8: error: invalid operand for instruction +vselgt.f64 s3, s2, s1 +@ V8: error: invalid operand for instruction +vselgt.f32 s0, q3, q1 +@ V8: error: invalid operand for instruction +vselgt.f64 q0, s3, q1 +@ V8: error: invalid operand for instruction + +vmaxnm.f32 s0, d2, d1 +@ V8: error: invalid operand for instruction +vminnm.f64 s3, s2, s1 +@ V8: error: invalid operand for instruction +vmaxnm.f32 s0, q3, q1 +@ V8: error: invalid operand for instruction +vmaxnm.f64 q0, s3, q1 +@ V8: error: invalid operand for instruction +vmaxnmgt.f64 q0, s3, q1 +@ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified + +vcvta.s32.f64 d3, s2 +@ V8: error: invalid operand for instruction +vcvtp.s32.f32 d3, s2 +@ V8: error: invalid operand for instruction +vcvtn.u32.f64 d3, s2 +@ V8: error: invalid operand for instruction +vcvtm.u32.f32 d3, s2 +@ V8: error: invalid operand for instruction +vcvtnge.u32.f64 d3, s2 +@ V8: error: instruction 'vcvtn' is not predicable, but condition code specified + +vcvtbgt.f64.f16 q0, d3 +@ V8: error: invalid operand for instruction +vcvttlt.f64.f16 s0, s3 +@ V8: error: invalid operand for instruction +vcvttvs.f16.f64 s0, s3 +@ V8: error: invalid operand for instruction +vcvtthi.f16.f64 q0, d3 +@ V8: error: invalid operand for instruction + +vrintrlo.f32.f32 d3, q0 +@ V8: error: invalid operand for instruction +vrintxcs.f32.f32 d3, d0 +@ V8: error: instruction requires: NEON + +vrinta.f64.f64 s3, q0 +@ V8: error: invalid operand for instruction +vrintn.f32.f32 d3, d0 +@ V8: error: instruction requires: NEON +vrintp.f32 q3, q0 +@ V8: error: instruction requires: NEON +vrintmlt.f32 q3, q0 +@ V8: error: instruction 'vrintm' is not predicable, but condition code specified |