diff options
| author | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:35:55 +0000 |
|---|---|---|
| committer | Jiangning Liu <jiangning.liu@arm.com> | 2012-08-02 08:35:55 +0000 |
| commit | 1c3781496081b47412fc70393bcdc5b67b440b02 (patch) | |
| tree | 30135007750b414b8ad8e3ef8900d9e002424147 /test/MC/ARM/vfp4.s | |
| parent | fd652df8b36a9d3e6b09ae2b9f7bcb07e88fdfaa (diff) | |
| download | llvm-1c3781496081b47412fc70393bcdc5b67b440b02.tar.gz llvm-1c3781496081b47412fc70393bcdc5b67b440b02.tar.bz2 llvm-1c3781496081b47412fc70393bcdc5b67b440b02.tar.xz | |
Support fpv4 for ARM Cortex-M4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161163 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/vfp4.s')
| -rw-r--r-- | test/MC/ARM/vfp4.s | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/test/MC/ARM/vfp4.s b/test/MC/ARM/vfp4.s index cc87a38112..0a1fe92abd 100644 --- a/test/MC/ARM/vfp4.s +++ b/test/MC/ARM/vfp4.s @@ -1,5 +1,6 @@ @ RUN: llvm-mc < %s -triple armv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=ARM @ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=THUMB +@ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mcpu=cortex-m4 | FileCheck %s --check-prefix=THUMB_V7EM @ ARM: vfma.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xe2,0xee] @ THUMB: vfma.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xa1,0x0b] @@ -7,6 +8,7 @@ vfma.f64 d16, d18, d17 @ ARM: vfma.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0xa2,0xee] @ THUMB: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a] +@ THUMB_V7EM: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a] vfma.f32 s2, s4, s0 @ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2] @@ -23,6 +25,7 @@ vfnma.f64 d16, d18, d17 @ ARM: vfnma.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0x92,0xee] @ THUMB: vfnma.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x40,0x1a] +@ THUMB_V7EM: vfnma.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x40,0x1a] vfnma.f32 s2, s4, s0 @ ARM: vfms.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xe2,0xee] @@ -31,6 +34,7 @@ vfms.f64 d16, d18, d17 @ ARM: vfms.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0xa2,0xee] @ THUMB: vfms.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x40,0x1a] +@ THUMB_V7EM: vfms.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x40,0x1a] vfms.f32 s2, s4, s0 @ ARM: vfms.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x62,0xf2] |