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author | Quentin Colombet <qcolombet@apple.com> | 2013-04-12 18:47:25 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2013-04-12 18:47:25 +0000 |
commit | d64ee4455a9d2fcec7e001c7f4c02d490bed5158 (patch) | |
tree | 435e989dba6407ed439b96c378be69e2ccdada2f /test/MC/ARM | |
parent | 9458f3ecee4d17ec9759a0351d2f339315cdebb1 (diff) | |
download | llvm-d64ee4455a9d2fcec7e001c7f4c02d490bed5158.tar.gz llvm-d64ee4455a9d2fcec7e001c7f4c02d490bed5158.tar.bz2 llvm-d64ee4455a9d2fcec7e001c7f4c02d490bed5158.tar.xz |
ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.
This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.
Patch by Mihail Popa <Mihail.Popa@arm.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM')
-rw-r--r-- | test/MC/ARM/basic-arm-instructions.s | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index f73ae1449d..a5f4501680 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -2309,7 +2309,7 @@ Lforward: strpl r3, [r10, #0]! @ CHECK: strpl r3, [r10, #-0]! @ encoding: [0x00,0x30,0x2a,0x55] -@ CHECK: strpl r3, [r10]! @ encoding: [0x00,0x30,0xaa,0x55] +@ CHECK: strpl r3, [r10, #0]! @ encoding: [0x00,0x30,0xaa,0x55] @------------------------------------------------------------------------------ @ SUB |