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| author | Tim Northover <Tim.Northover@arm.com> | 2013-04-10 12:08:35 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-04-10 12:08:35 +0000 |
| commit | 8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4 (patch) | |
| tree | b9506d93306a8ea590e51a69a8e489744f251a58 /test/MC/Disassembler/ARM | |
| parent | 2318508117fbc567bfef5b67a63c91ff7fad2697 (diff) | |
| download | llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.tar.gz llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.tar.bz2 llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.tar.xz | |
ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
These instructions aren't universally available, but depend on a specific
extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new
feature is appropriate.
This also enables the feature by default on A-class cores which usually have
these extensions, to avoid breaking existing code and act as a sensible
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179171 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/ARM')
| -rw-r--r-- | test/MC/Disassembler/ARM/arm-thumb-trustzone.txt | 17 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/arm-trustzone.txt | 16 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/basic-arm-instructions.txt | 9 |
3 files changed, 33 insertions, 9 deletions
diff --git a/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt b/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt new file mode 100644 index 0000000000..d6b7cf1a0b --- /dev/null +++ b/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + +#------------------------------------------------------------------------------ +# SMC +#------------------------------------------------------------------------------ + +0xff 0xf7 0x00 0x80 +0x0c 0xbf +0xf0 0xf7 0x00 0x80 + +# NOTZ-NOT: smc #15 +# NOTZ-NOT: smceq #0 +# TZ: smc #15 +# TZ: ite eq +# TZ: smceq #0 diff --git a/test/MC/Disassembler/ARM/arm-trustzone.txt b/test/MC/Disassembler/ARM/arm-trustzone.txt new file mode 100644 index 0000000000..92d5d6b290 --- /dev/null +++ b/test/MC/Disassembler/ARM/arm-trustzone.txt @@ -0,0 +1,16 @@ +# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + +#------------------------------------------------------------------------------ +# SMC +#------------------------------------------------------------------------------ + +0x7f 0x00 0x60 0xe1 +0x70 0x00 0x60 0x01 + +# NOTZ-NOT: smc #15 +# NOTZ-NOT: smceq #0 +# TZ: smc #15 +# TZ: smceq #0 + diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt index 1100ce64a9..477ba728b3 100644 --- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -1442,15 +1442,6 @@ 0xf2 0x4f 0x38 0xc6 #------------------------------------------------------------------------------ -# SMC -#------------------------------------------------------------------------------ -# CHECK: smc #15 -# CHECK: smceq #0 - -0x7f 0x00 0x60 0xe1 -0x70 0x00 0x60 0x01 - -#------------------------------------------------------------------------------ # SMLABB/SMLABT/SMLATB/SMLATT #------------------------------------------------------------------------------ # CHECK: smlabb r3, r1, r9, r0 |