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* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-13
* s tightens up the encoding description for ARM post-indexed ldr instructions....Mihai Popa2013-04-30
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-26
* ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover2013-04-19
* ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover2013-04-19
* ARM: Correct printing of pre-indexed operands.Quentin Colombet2013-04-12
* ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.Tim Northover2013-04-10
* Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th...Gordon Keiser2013-03-28
* Patch by Gordon Keiser!Joe Abbey2013-03-26
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-22
* Make ARMAsmParser accept the correct alignment specifier syntax in instructions.Kristof Beyls2013-02-14
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-05
* Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby2012-11-29
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-30
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-29
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-22
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-06
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-06
* Use correct part of complex operand to encode VST1 alignment.Tim Northover2012-09-06
* ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.Jim Grosbach2012-08-13
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-02
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-02
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-02
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-10
* Fix the remaining TCL-style quotes found in the testsuite. This isChandler Carruth2012-07-02
* Convert the uses of '|&' to use '2>&1 |' instead, which works on oldChandler Carruth2012-07-02
* Convert all tests using TCL-style quoting to use shell-style quoting.Chandler Carruth2012-07-02
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-06
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-11
* Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby2012-05-03
* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-03
* Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton2012-05-02
* Specify cpu to unbreak tests.Evan Cheng2012-04-26
* Add missing test cases for ARM VLD3 (single 3-element structure to all lanes)Kevin Enderby2012-04-24
* Add missing test cases for ARM VLD4 (single 4-element structure to all lanes)Kevin Enderby2012-04-24
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-18
* Fix the bahavior of the disassembler when decoding unpredictable mrs instruct...Silviu Baranga2012-04-18
* Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ...Silviu Baranga2012-04-18
* Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocess...Silviu Baranga2012-04-18
* Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instruct...Silviu Baranga2012-04-18
* Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby2012-04-17
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-11
* Fix ARM disassembly of VLD instructions with writebacks.  And add test a caseKevin Enderby2012-04-11
* Fix a number of problems with ARM fused multiply add/subtract instructions.Evan Cheng2012-04-11
* Added support for unpredictable ADC/SBC instructions on ARM, and also fixed s...Silviu Baranga2012-04-05
* Added support for handling unpredictable arithmetic instructions on ARM.Silviu Baranga2012-04-05
* Added fix in TableGen instruction decoder generation. The decoder now breaks ...Silviu Baranga2012-04-02
* Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnuEli Bendersky2012-03-25
* Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga2012-03-22
* Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga2012-03-22
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