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| author | Richard Barton <richard.barton@arm.com> | 2013-09-05 14:14:19 +0000 |
|---|---|---|
| committer | Richard Barton <richard.barton@arm.com> | 2013-09-05 14:14:19 +0000 |
| commit | b5523ce1bb50e86942ad5273e3a89872c4d26b73 (patch) | |
| tree | 4be4ea725d7c13d57c90ad89d1d9ba1abebcd9e2 /test/MC/Disassembler/ARM | |
| parent | 8f3d54d057007552d0abc37c87a50ef34a7ab9ef (diff) | |
| download | llvm-b5523ce1bb50e86942ad5273e3a89872c4d26b73.tar.gz llvm-b5523ce1bb50e86942ad5273e3a89872c4d26b73.tar.bz2 llvm-b5523ce1bb50e86942ad5273e3a89872c4d26b73.tar.xz | |
Add AArch32 DCPS{1,2,3} and HLT instructions.
These were pretty straightforward instructions, with some assembly support
required for HLT.
The ARM assembler is keen to split the instruction mnemonic into a
(non-existent) 'H' instruction with the LT condition code. An exception for
HLT is needed.
HLT follows the same rules as BKPT when in IT blocks, so the special BKPT
hadling code has been adapted to handle HLT also.
Regression tests added including diagnostic tests for out of range immediates
and illegal condition codes, as well as negative tests for pre-ARMv8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190053 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/ARM')
| -rw-r--r-- | test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt | 11 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb-v8.txt | 18 |
2 files changed, 29 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt b/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt new file mode 100644 index 0000000000..8d4debf93a --- /dev/null +++ b/test/MC/Disassembler/ARM/basic-arm-instructions-v8.txt @@ -0,0 +1,11 @@ +# RUN: llvm-mc -disassemble -triple armv8 -show-encoding < %s | FileCheck %s + +# New v8 ARM instructions + +# HLT + +0x70 0x00 0x00 0xe1 +# CHECK: hlt #0 + +0x7f 0xff 0x0f 0xe1 +# CHECK: hlt #65535 diff --git a/test/MC/Disassembler/ARM/thumb-v8.txt b/test/MC/Disassembler/ARM/thumb-v8.txt new file mode 100644 index 0000000000..075b17c9a2 --- /dev/null +++ b/test/MC/Disassembler/ARM/thumb-v8.txt @@ -0,0 +1,18 @@ +# RUN: llvm-mc -disassemble -triple thumbv8 -show-encoding < %s | FileCheck %s + +0x80 0xba +# CHECK: hlt #0 + +0xbf 0xba +# CHECK: hlt #63 + +# DCPS{1,2,3} + +0x8f 0xf7 0x01 0x80 +# CHECK: dcps1 + +0x8f 0xf7 0x02 0x80 +# CHECK: dcps2 + +0x8f 0xf7 0x03 0x80 +# CHECK: dcps3 |