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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-05-14 10:17:52 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-05-14 10:17:52 +0000 |
commit | c3b20c260ee17a66c6306f81293c75681d8ea0aa (patch) | |
tree | fdc283d6c8468f22fb87cf0b90cf4abf46cf7170 /test/MC/Disassembler/SystemZ/invalid-regs-01.txt | |
parent | 5096dc74ae0df903d54085af3a57fa66b382493c (diff) | |
download | llvm-c3b20c260ee17a66c6306f81293c75681d8ea0aa.tar.gz llvm-c3b20c260ee17a66c6306f81293c75681d8ea0aa.tar.bz2 llvm-c3b20c260ee17a66c6306f81293c75681d8ea0aa.tar.xz |
[SystemZ] Add disassembler support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181777 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/SystemZ/invalid-regs-01.txt')
-rw-r--r-- | test/MC/Disassembler/SystemZ/invalid-regs-01.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/test/MC/Disassembler/SystemZ/invalid-regs-01.txt b/test/MC/Disassembler/SystemZ/invalid-regs-01.txt new file mode 100644 index 0000000000..12440677ba --- /dev/null +++ b/test/MC/Disassembler/SystemZ/invalid-regs-01.txt @@ -0,0 +1,22 @@ +# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu < %s 2>&1 | FileCheck %s + +# This would be "axbr %f14, %f0", but %r14 is invalid. +# +# CHECK: warning: invalid instruction encoding +# CHECK-NEXT: 0xb3 0x4a 0x00 0xe0 +# CHECK-NEXT: ^ +0xb3 0x4a 0x00 0xe0 + +# This would be "axbr %f0, %f2", but %f2 is invalid. +# +# CHECK-NEXT: warning: invalid instruction encoding +# CHECK-NEXT: 0xb3 0x4a 0x00 0x02 +# CHECK-NEXT: ^ +0xb3 0x4a 0x00 0x02 + +# This would be "dlr %r1, %r8", but %r1 is invalid. +# +# CHECK-NEXT: warning: invalid instruction encoding +# CHECK-NEXT: 0xb9 0x97 0x00 0x18 +# CHECK-NEXT: ^ +0xb9 0x97 0x00 0x18 |